DM560P
V.90 Integrated Data/Fax/Voice/Speakerphone Modem Device Set
18
Preliminary
Version: DM560P-DS-P07
August 11, 2000
Vender Define Register
Index
Name
Type
Definition
F0H
Auto Configuration
R/W
The I/O base address and IRQ can be configured by CPU through
this register. (It can also be configured by micro-controller. See
previous section).
F1H
IRQ Status Enable
W
Before reading IRQ lines status, bit 0 must be set in order to load IRQ
lines status to IRQ Status register, bit 1 enable Pull Low resistor.
F2H
IRQ Status
R
This register responds to IRQ lines status to determine which
interrupt has been used by the system. bit 0: IRQ 3 bit 1: IRQ 4 bit 2:
IRQ 5 bit 3: IRQ 7 bit 4: IRQ 10 bit 5: IRQ11 bit 6: IRQ12 bit 7: IRQ15.
F3H
Wake up controller
W
When 80C32 enter power down mode, set bit0 of this register to wake
up 80C32. This bit will be cleared automatically.
DM6583 Configuration Modes
The DM6583A will power-on in jumperless mode.
The default configuration is set by loading the default
value stored in 93C46 to the Auto-configuration
register. These values can be modified by software
via the logical device configuration registers in DM
Jumperless mode. This updated value of the new
configuration is only valid temporarily and will be lost
after an active PC Hardware Reset. Permanent
changes of the default configuration will be done by
informing micro-controller to modify the contents of
the 93C46 via the Auto-configuration Register.
The Plug and Play logic can operate through two
configuration modes: One is DM Jumperless mode,
the other PnP mode. There are two operating
methods between the two modes: First, setting hard
configuration through Initiation Key sequences,
second, setting hard configuration according to the
register that is used, I/O Configuration Register or
Auto-configuration Register.
The Initiation Key for Plug and Play
The Plug and Play logic is available upon powering
up however, must be enabled by software.
This is achieved by a predefined series of writes (32
I/O writes) to the Address port, which is called the
Initiation Key. When the proper series of the I/O
writes is detected, the Plug and Play read/write data
ports are enabled. The Write sequence will be reset
and must be issued from the beginning if any data
mismatch occurs. The exact sequence for the
Initiation Key is listed below in hexadecimal notion.
PnP Initiation Key
6A, B5, DA, ED, F6, FB, 7D, BE, DF, 6F, 37, 1B, 0D,
86, C3, 61, B0, 58, 2C, 16, 8B, 45, A2, D1, E8, 74,
3A, 9D, CE, E7, 73, 39
DM Initiation Key (Jumperless)
68, 34, 1A, 8D, CB, E3, 71, B8, 5C, 2E, 97, 4B, 25,
92, C9, E4, 72, B9, DC, 6E, B7, 5B, 2D, 96, CB, 65,
B2, D9, EC, 76, BB, 5D
Isolation Protocol
A simple algorithm is used to isolate each Plug and
Play card. This algorithm uses the signals on the ISA
bus and requires lock-step operation between the
Plug and Play hardware and the isolation software.
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
