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STPMIC1APQR 数据表(PDF) 76 Page - STMicroelectronics |
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STPMIC1APQR 数据表(HTML) 76 Page - STMicroelectronics |
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76 / 140 page ![]() 6.3.2 Pads pull control register (PADS_PULL_CR) Table 26. PADS_PULL_CR 7 6 5 4 3 2 1 0 reserved reserved reserved WKUP_EN PWRCTRL_PD PWRCTRL_PU WKUP_PD PKEY_PU R/W R/W R/W R/W R/W R/W R/W R/W Address: 0x11 Type: read/write register Default: 0x00 Description: pads pull control register. This register is initialized to default values upon entering CHECK&LOAD state. [7 :5] Reserved [4] WKUP_EN: Enable WAKEUP detector 0: WAKEUP detector is enabled 1: WAKEUP detector is disabled [3] PWRCTRL_PD: PWRCTRL pull-down control 0: PD inactive 1: PD active Note: this bit has higher priority than PWRCTRL_PU. [2] PWRCTRL_PU: PWRCTRL pull-up control 0: PU inactive 1: PU active [1] WKUP_PD: WAKEUP pull-down control (reverse logic) 0: PD active 1: PD not active [0] PKEY_PU: PONKEY pull-up control (reverse logic) 0: PU active 1: PU not active STPMIC1 Control registers DS12792 - Rev 7 page 76/140 |
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