STPMIC1APQR datasheet(33/140 Pages) STMICROELECTRONICS

33 / 140 page

4.3.2

Powering DDR3/DDR3L memory

Figure 41. Powering DDR3/DDR3L memory (LDO3 in sink/source mode)

The example in Figure 41. Powering DDR3/DDR3L memory (LDO3 in sink/source mode) shows how to use LDO3

in sink/source mode to power supply termination resistor network of DDR3/DDR3L memory (aka VTT). LDO3IN is

a power supply from BUCK2 output (VOUT2) and LDO3 output regulate at Vout2/2 voltage.

4.4

Buck converters

4.4.1

BUCK general description

There are 4 buck converters in the STPMIC1 optimised to supply circuits with high current consumption and fast

transient response requirement.

BUCK1 is primarily dedicated to power supply CORE power domain of application processors.

BUCK2 is primarily dedicated to power supply DDR memory.

BUCK3 is primarily dedicated to VIO domain and analog subsystem.

BUCK4 is for general purpose, it can be used to supply CPU power domain of application processors having

CORE and CPU power domain splitted.

All converters are based on an adaptive constant-on-time controller (COT), that guarantees an excellent transient

response and high efficiency across a wide range of operating conditions.

Each converter can work in 2 power modes – HP mode, and LP mode. These modes differ both in performance

and quiescent current consumption. In HP mode the highest performance can be reached, while in LP mode the

performance is lower with a much lower consumption.

Switching frequency of converter is 2 MHz in steady-state CCM condition. During load transient, switching

frequency can be temporarily increased/decreased to provide accurate amount of energy needed and minimize

voltage error. Refer to the figure below.

STPMIC1

Buck converters

DS12792 - Rev 7

page 33/140

STPMIC1APQR 数据表(PDF) 33 Page - STMicroelectronics