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STPMIC1APQR 数据表(PDF) 97 Page - STMicroelectronics |
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STPMIC1APQR 数据表(HTML) 97 Page - STMicroelectronics |
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97 / 140 page ![]() 6.4.10 LDO4 ALTERNATE mode control register (LDO4_ALT_CR) Table 47. LDO4_ALT_CR 7 6 5 4 3 2 1 0 reserved reserved reserved reserved reserved reserved reserved ENA R/W R/W R/W R/W R/W R/W R/W R/W Address: 0x38 Type: read/write register Default: 0x00 Description: LDO4 ALTERNATE mode control register. Register is set to a default value in CHECK&LOAD. User can write to this register to control enable LDO4 that is applied to ALTERNATE mode. [7 :1] Reserved [0] ENA: LDO4 enable bit 0: LDO4 is disabled 1: LDO4 is enabled STPMIC1 Power supplies control registers DS12792 - Rev 7 page 97/140 |
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