STPMIC1APQR datasheet(102/140 Pages) STMICROELECTRONICS

部件名	STPMIC1APQR

功能描述	Highly integrated power management IC for micro processor units

PDF	140 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

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102 / 140 page

6.5.4

Interrupt pending register 3 (INT_PENDING_R3)

Table 51. INT_PENDING_R3

SWOUT_SH

VBUSOTG_SH

LDO6_OCP

LDO5_OCP

LDO4_OCP

LDO3_OCP

LDO2_OCP

LDO1_OCP

Address: 0x52

Type: read register only

Default: 0x00

Description: interrupt pending register 3. Register is set to default on RSTn assertion

For all bits:

0: IT not pending

1: IT pending

[7]

SWOUT_SH: A short event has been detected on SWOUT pin.

Refer to Section 4.5.2 PWR_USB_SW and PWR_SW power switches

[6]

VBUSOTG_SH: A short event has been detected on VBUSOTG pin. Refer to Section 4.5.2 PWR_USB_SW and

PWR_SW power switches

[5] LDO6_OCP: Current limitation detected on LDO6

[4] LDO5_OCP: Current limitation detected on LDO5

[3] LDO4_OCP: Current limitation detected on LDO4

[2] LDO3_OCP: Current limitation detected on LDO3

[1] LDO2_OCP: Current limitation detected on LDO2

[0] LDO1_OCP: Current limitation detected on LDO1

STPMIC1

Interrupt registers

DS12792 - Rev 7

page 102/140

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