ADPA1105ACGZN-R7 datasheet(12/16 Pages) AD

12 / 16 page

ADPA1105

Data Sheet

Rev. 0 | Page 12 of 16

–6

PIN (dBm)

–1

1.6GHz

1.5GHz

1.4GHz

1.3GHz

1.2GHz

1.1GHz

1.0GHz

0.9GHz

Figure 43. PDISS vs. PIN, Drain Bias Pulse Width = 100 μs

at 10% Duty Cycle, TBASE = 85°C

–6

PIN (dBm)

–1

1.6GHz

1.5GHz

1.4GHz

1.3GHz

1.2GHz

1.1GHz

1.0GHz

0.9GHz

Figure 44. PDISS vs. PIN, Drain Bias Pulse Width = 20 μs

at 2% Duty Cycle, TBASE = 85°C

0.1

0.01

OUTPUT POWER (dBm)

+85°C

+25°C

–40°C

Figure 45. Detector Voltage (VREF − VDET) vs. Output Power for

Various Temperatures at 1.2 GHz

–6

PIN (dBm)

–1

1.6GHz

1.5GHz

1.4GHz

1.3GHz

1.2GHz

1.1GHz

1.0GHz

0.9GHz

Figure 46. PDISS vs. PIN, Drain Bias Pulse Width = 200 μs

at 20% Duty Cycle, TBASE = 85°C

–6

PIN (dBm)

–1

1.6GHz

1.5GHz

1.4GHz

1.3GHz

1.2GHz

1.1GHz

1.0GHz

0.9GHz

Figure 47. PDISS vs. PIN, Drain Bias Pulse Width = 50 μs

at 5% Duty Cycle, TBASE = 85°C

550

–50

VGG1 AND VGG2 (V)

100

150

200

250

300

350

500

450

400

Figure 48. IDQ vs. VGG1 and VGG2, VDD1 and VDD2 = 50 V,

Representative of a Typical Device

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