ADPA1105

Data Sheet

Rev. 0 | Page 14 of 16

APPLICATIONS INFORMATION

BASIC CONNECTIONS

The basic connections for operating the ADPA1105 are shown

in Figure 50. Apply a power supply voltage between 20 V and 50 V

values shown in Figure 50. Place 3.9 Ω resistors in series with the

two 1000 pF power supply decoupling capacitors connected to Pin

Pin 2, Pin 3, Pin 7, Pin 12, Pin 13, Pin 18, Pin 22, Pin 23, Pin 26,

Pin 27, Pin 29, and Pin 30 are designated as no connect (NC) pins.

Although these pins are not internally connected, the pins were

all connected to ground during the characterization of the device

and provide some additional thermal relief.

lines represent the configuration that was used to characterize

and qualify the ADPA1105. The user can reduce the number of

capacitors, but the result varies from system to system. General

guidance is to first remove or combine the largest capacitors

that are farthest from the device.

External bias is provided to the on-chip RF detection circuit via

two 715 Ω resistors that are pulled up to 5 V, which results in a

current draw of approximately 12 mA. An operation amplifier

configured as a differential amplifier can be used to subtract

VDET from VREF to yield a temperature compensated voltage

that is proportional to the RF output power.

lines to set the bias level and drain current. Because the

ADPA1105 cannot support continuous operation, the device

must be operated in pulsed mode by pulsing either the gate

voltage or the drain voltage.

+50 V) while the gate voltage is pulsed between −4 V (off) and

approximately −2.3 V (on). The exact on level can be adjusted

to achieve the desired quiescent drain current.

while the gate voltage is held at a fixed negative level between

0 V and −4 V. Because high currents and voltages are being

switched on and off, a metal-oxide semiconductor field effect

transistor (MOSFET) and a MOSFET switch driver are required

in the circuit. Large capacitors are also required, which act as

local reservoirs of charge and help provide the drain current

required by the ADPA1105 while maintaining a steady drain

voltage during the on time of the pulse.

The ADPA1105-EVALZ evaluation board package includes a

plugin pulser board that contains the required circuitry to

implement drain pulsed mode. See the ADPA1105-EVALZ for

more information.

17

1

3

4

2

5

6

RFIN

(0V TO –4V)

7

8

18

19

20

21

RFOUT

50V/2A

715Ω

VREF

VDET

715Ω

5V

C13

0.39nF

GROUND

PAD

C3

1000pF

3.9Ω

C14

1000pF

3.9Ω

C12

0.39nF

22

23

24

C4

1µF

C6

0.01µF

C10

100pF

C5

1µF

C7

0.01µF

C11

100pF

Figure 50. Basic Connection