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ADPA1105ACGZN-R7 数据表(PDF) 15 Page - Analog Devices |
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ADPA1105ACGZN-R7 数据表(HTML) 15 Page - Analog Devices |
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15 / 16 page ![]() Data Sheet ADPA1105 Rev. 0 | Page 15 of 16 THERMAL MANAGEMENT Proper thermal management is critical to achieve the specified performance and rated operating life. Pulsed biasing is required to limit the average power dissipated and maintain a safe channel temperature. The channel (or die) temperature correlates closely with the mean time to failure. Consider a continuous bias case (see Figure 51). When bias is applied, the channel temperature (TCHAN) of the device rises through a turn on transient interval and eventually settles to a steady state value. Calculate the θJC thermal resistance of the device as the rise in TCHAN above the starting TBASE divided by the total device PDISS with the following equation: θJC = tRISE/PDISS (1) where: tRISE is the peak rise in the TCHAN of the device above the TBASE (°C). PDISS is the power dissipation (W) of the device. tRISE = θJC × PDISS TCHAN TBASE TIME Figure 51. Continuous Bias Next, consider a pulsed bias case at low duty cycle (see Figure 52). When bias is applied, the TCHAN of the device can be described as a series of exponentially rising and decaying pulses. The peak channel temperature reached during consecutive pulses increases during the turn on transient interval, and eventually settles to a steady state condition where peak channel temperatures from pulse to pulse stabilize. tRISE = θJC × PDISS TCHAN TBASE POWER DISSIPATED DURING THE PULSE TIME Figure 52. Pulsed Bias at Low Duty Cycle Transient thermal measurements were performed on the ADPA1105 amplifier at several different bias pulse widths and duty cycles to obtain the thermal resistance values listed in Table 7. Table 7. Pulse Settings and Thermal Resistance Values Pulse Settings θJC (°C/W) Pulse Width (μs) Duty Cycle (%) 100 10 2.11 200 20 2.82 300 30 3.54 Narrower pulse widths and/or lower duty cycles can result in greater reliability. The ADPA1105 amplifier is designed for low duty cycle pulsed applications. However, there can be brief periods of time when the device operates (perhaps accidently) under continuous bias conditions. The thermal resistance increases to 6.5°C/W under these conditions. Even at the nominal quiescent bias VDD1 and VDD2 = 50 V and IDD = 0.4 A), the 20 W power dissipation results in a 130°C channel temperature rise above the base temperature. Use extreme caution in this case to ensure that the device does not exceed the device maximum reliable channel temperature of 200°C. |
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