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LTM4656 数据表(PDF) 7 Page - Analog Devices |
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LTM4656 数据表(HTML) 7 Page - Analog Devices |
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7 / 28 page ![]() LTM4656/LTM4656-1 7 Rev. 0 For more information www.analog.com all COMP pins together for parallel operation. The device is internal compensated. The LTM4656-1 offers an External Compensation option. SENSE1 (A7–A8, B7–B8, C7–C8): These pins are the output side of the input protection power MOSFET, and the input to the onboard 4mΩ current sense resistor that sets maximum input current limit to trip off and retry in a output short. Measuring the voltage drop between SENSE1 and BVIN, and dividing by the 4mΩ resistance gives the input current for a given operating condition in the boost converter. RUN (H7): RUN Pin Monitor. The threshold level of 1.28V will turn on the boost converter. An internal 75k resistor is connected from this pin to BVIN, and a 5.1V Zener diode to GNDisinternaltothemoduleforlimitingthevoltageonthe RUN pin to 5V. The RUN pin is allowed to turn on from an open-collector control coming from the in-line protection control when the voltage at the BVIN pin is within 0.5V of VIN and 3V above GND, indicating the protection MOSFET is fully on. The state of the pin stays on until the BVIN pin voltage drops below 2V. See Block Diagram. INTVCC (G9): Output of Internal 5.4V LDO. Power supply for internal control circuits and gate drivers. There is an internal 4.7µF low ESR ceramic capacitor from this pin to ground for decoupling. VBIAS (F9): Main Control Supply Pin. It is normally tied to the input supply BVIN or to the output of the boost converter. A bypass capacitor should be tied between this pin and the GND pin. The operating voltage range on this pin is 4.5V to 36V. PGOOD (F8): Power Good Indicator. Open-drain logic output that is pulled to ground when the output voltage is more than ±10% away from the regulated output voltage. To avoid false trips, the output voltage must be outside of the range for 25µs before this output is activated. TMR (G4): Fault Timer Input. An internal 0.01µF capacitor to ground sets the times for early fault warning, fault turn- off, and cooldown periods. The current charging up this pin during fault conditions depends on the voltage differ- ence between the VIN and BVIN pins. When TMR reaches 1.275V, the FLT pin pulls low to indicate the detection of a faultcondition.Iftheconditionpersists,thepasstransistor turnsoffwhenTMRreachesthethresholdof1.375V.A2µA current source then continues to pull the TMR up. When TMR reaches 4.3V, the 2µA current reverses direction and starts to pull the TMR pin low. When TMR reaches the retry threshold of 0.5V, the GATE pin pulls high turning back on the pass transistor. See Typical Applications section. NC (E3): Float Pin. SHDN(F1):TheLTM4656canbeshutdowntoalowcurrent mode when the voltage at the SHDN pin is pulled below the shutdown threshold of 0.4V. The quiescent current drops downto40µAwithinternalcircuitryturnedoff.Thispinwill shut down the in-line protection and the boost converter. The SHDN pin can be pulled up to VIN MAX or below GND by up to VIN MAX without damage. The SHDN pin is pulled up to VIN with an internal 100k resistor for active on. An VIN rated open collector can be used to controlled this pin for enabling the in-line protection and the boost converter, or a Zener diode can be placed from this pin to ground to interface to lower voltage rated pull downs. UV (H2): Undervoltage Comparator Input. When UV falls below its threshold of 1.275V, the GATE pin is pulled down with a 1mA current. When UV rises above 1.275V plus the hysteresis, the pull-down current disappears and the GATE pin is pulled up by the internal charge pump. This is used to set up an undervoltage lockout to limit the input current during startup. There is an internal 100k resistor from this pin to VIN to set up with an external resistor an under voltage trip point. If unused, connect to VCC. See Typical Applications section. FLT (H3): Open Collector Fault Output. This pin pulls low after the voltage at the TMR pin has reached the fault threshold of 1.275V. It indicates the pass transistor is about to turn off because the device is in an overcurrent condition (current fault). The internal NPN is capable of sinking up to 100µA of current while maintaining a low level of 0.8V max. TEMP+ (H4): Onboard temperature diode for monitoring each channel with differential connections for noise im- munity. See Block Diagram. TEMP– (H5): Onboard temperature diode for monitoring each channel with differential connections for noise im- munity. See Block Diagram. PIN FUNCTIONS |
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