LTM4656 datasheet(18/28 Pages) AD

18 / 28 page

LTM4656/LTM4656-1

Rev. 0

For more information www.analog.com

APPLICATIONS INFORMATION

A graphical representation of the aforementioned ther-

mal resistances is given in Figure 8; blue resistances are

contained within the µModule regulator, whereas green

resistances are external to the µModule.

As a practical matter, it should be clear to the reader that

no individual or sub-group of the four thermal resistance

parameters defined by JESD 51-12 or provided in the

Pin Configuration section replicates or conveys normal

operating conditions of a µModule. For example, in normal

board-mounted applications, never does 100% of the

device’s total power loss (heat) thermally conduct exclu-

sively through the top or exclusively through bottom of the

µModule—asthestandarddefinesforθJCtopandθJCbottom,

respectively.Inpractice,powerlossisthermallydissipated

in both directions away from the package—granted, in the

absence of a heat sink and airflow, a majority of the heat

flow is into the board.

Within a SIP (system-in-package) module, be aware there

are multiple power devices and components dissipating

power, with a consequence that the thermal resistances

relative to different junctions of components or die are not

exactly linear with respect to total package power loss. To

reconcile this complication without sacrificing modeling

simplicity—but also, not ignoring practical realities—an

approach has been taken using FEA software modeling

along with laboratory testing in a controlled-environment

chamber to reasonably define and correlate the thermal

resistance values supplied in this data sheet: (1) Initially,

FEA software is used to accurately build the mechanical

geometry of the µModule and the specified PCB with all

of the correct material coefficients along with accurate

power loss source definitions; (2) this model simulates

a software-defined JEDEC environment consistent with

JESD51-9 to predict power loss heat flow and temperature

readingsatdifferentinterfacesthatenablethecalculationof

theJEDEC-definedthermalresistancevalues;(3)themodel

and FEA software is used to evaluate the µModule with

heat sink and airflow; (4) having solved for and analyzed

these thermal resistance values and simulated various

operating conditions in the software model, a thorough

laboratory evaluation replicates the simulated conditions

with thermocouples within a controlled-environment

chamber while operating the device at the same power

loss as that which was simulated. An outcome of this

process and due-diligence yields a set of derating curves

provided in other sections of this data sheet. After these

laboratorytestshavebeenperformedandcorrelatedtothe

µModulemodel,thentheθJBandθBAaresummedtogether

to correlate quite well with the µModule model with no

airflow or heat sinking in a properly define chamber. This

θJB + θBA value is shown in the Pin Configuration section

and should accurately equal the θJA value because ap-

proximately 100% of power loss flows from the junction

through the board into ambient with no airflow or top

mounted heat sink.

The 5V, 12V and 24V input power loss curves in Figure 9

toFigure11canbeusedincoordinationwiththeloadcurrent

derating curves in Figure 12 to Figure 17 for calculating

an approximate θJA thermal resistance for the LTM4656

with various heat sinking and airflow conditions. The

power loss curves are taken at room temperature, and

are increased with multiplicative factors according to the

ambient temperature. These approximate factors is 1.4

assuming the junction temperature at 120°C. The output

voltages are chosen to include the lower and higher out-

put voltage ranges for correlating the thermal resistance.

Thermal models are derived from several temperature

measurementsinacontrolledtemperaturechamberalong

withthermalmodelinganalysis.Thejunctiontemperatures

are monitored while ambient temperature is increased

with and without airflow. The power loss increase with

ambient temperature change is factored into the derating

curves. The junctions are maintained at 120°C maximum

while lowering output current or power with increasing

ambient temperature. The decreased output current will

decrease the internal module loss as ambient temperature

isincreased.Themonitoredjunctiontemperatureof120°C

minus the ambient operating temperature specifies how

much module temperature rise can be allowed. As an

example in Figure 15, the load current is derated to ~3.2A

at ~ 80°C with no air or heat sink and the power loss for

the 12V to 24V at 3.2A output is about 3W. The 4.48W

loss is calculated with the ~ 3W room temperature loss

from the 12V to 24V power loss curve at 3.2A, and the

1.4 multiplying factor. If the 80°C ambient temperature

is subtracted from the 120°C junction temperature, then

LTM4656 数据表(PDF) 18 Page - Analog Devices

LTM4656 数据表(HTML) 18 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

数据表下载