AM79C02AJC datasheet(42/48 Pages) AMD

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Am79C02/03/031(A) Data Sheet

The value of hi in Equation 3 represents a decimal

number that is broken down into a sum of successive

values of:

±1.0 multiplied by 2–0, or 2–1, or 2–2...2–7...

±1.0 multiplied by 1, or 1/2, or 1/4...1/128...

The limit on the negative powers of 2 is determined by

the length of the registers in the ALU.

The coefficient hi in Equation 3 can be considered to be

a value made up of N binary 1s in a binary register where

the leftmost part represents whole numbers, the right-

most part represents decimal fractions, and a decimal

point separates them. The first binary 1 is shifted M1

bits to the right of the decimal point, the second binary

1 is shifted M2 bits to the right of the decimal point, the

third binary 1 is shifted M3 bits to the right of the decimal

point, and so on.

Note that when M1 is 0, the resulting value is a binary 1

in front of the decimal point, that is, no shift. If M2 also is

0, the result is another binary 1 in front of the decimal

point, giving a total value of binary 10 in front of the dec-

imal point (i.e., a decimal value of 2.0). The value of N,

therefore, determines the range of values the coefficient

hi can take (e.g., if N = 3, the maximum and minimum

values are ±3, and if N = 4, the values are between ±4).

Detailed Description of DSLAC

Device Coefficients

The CSD coding scheme in the DSLAC device uses a

value called mi, where m1 represents the distance shift-

ed right of the decimal point for the first binary 1. m2

represents the distance shifted to the right of the previ-

ous binary 1, and m3 represents the number of shifts to

the right of the second binary 1. Note that the range of

values determined by N is unchanged. Equation 3 now

is modified (in the case of N = 4) to:

Eq. (4)

Eq. (5)

Eq. (6)

where:

and

In the DSLAC device, a coefficient, hi, consists of N CSD

coefficients, each being made up of 4 bits and formatted

as Cxymxy, where Cxy is one bit (MSB) and mxy is 3 bits.

Each CSD coefficient is broken down as follows:

is the sign bit (0 = positive, 1 = negative).

mxy

is the 3-bit shift code. It is encoded as a

binary number as follows:

000:

0 shifts

001:

1 shifts

010:

2 shifts

011:

3 shifts

100:

4 shifts

101:

5 shifts

110:

6 shifts

111:

7 shifts

is the coefficient number (the i in hi).

is the position of this CSD coefficient position

of the binary 1 represented by this CSD coef-

ficient within the hi coefficient. The most sig-

nificant binary 1 is represented by x = 1. The

next most significant binary 1 is represented

by x = 2, and so on.

Thus, C13m13 represents the sign and the relative shift

position for the first (most significant) binary 1 in the 4th

(h3) coefficient.

The number of CSD coefficients, N, is limited to 4 in the

GR, GX, R, X, Z, and the IIR part of the B filter, and 3

for the FIR part of the B filter. Note also that the GX filter

coefficient equation is slightly different from that of the

other filters.

Eq. (7)

Please refer to the section detailing the commands for

complete details on the programming of the coefficients.

Adaptive B Filter Overview

The DSLAC device B filter is designed to work with pre-

programmed coefficients or with coefficients deter-

mined by an adaptive algorithm (Note: The adaptive

transhybrid balance feature is guaranteed only on the

Am79C02A/03A/031A versions). The adaptive algo-

rithm can be operated in a mode where it continuously

adapts or where it adapts for a short period, and then

holds its value.

Operation with preprogrammed coefficients requires

only the use of MPI Command 30 to feed in the coeffi-

cients. The Adaptive mode uses some preprogrammed

coefficients and generates new ones using an algo-

rithm, which by a series of iterations, minimizes the re-

ceive signal that is echoed in the transmit signal (due

to mismatches in the SLIC, hybrid, and line). Adaptation

applies to the FIR part of the filter only. Preprogrammed

coefficients used to initiate the adaptive algorithm must

be “valid” (shown under Command 30). Other valid co-

efficients may be obtained by using this coefficient, run-

ning adaptive balance, and then reading back the

registers (refer to #30 in command structure).

–

+++

–

1C22

()

–

1C2C32

()

–

1C2C3C42

+++

()

–

()

•

[

]

•

{

}

•

+++

•

iGX

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