LP87702 datasheet(7/98 Pages) TI

7 / 98 page

Limits apply over the junction temperature range –40°C ≤ TJ ≤ 140°C, specified VVANA, VVIN_Bx, VVOUT_Bx, VVOUT_BST, and

IOUT range, unless otherwise noted. Typical values are at TA = 25°C, VVANA = VVIN_Bx = 3.3 V, VOUT_BST = 5 V and VOUT_Bx =

1 V, unless otherwise noted. (1) (2)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Minimum voltage

difference between

V(VIN_Bx) and VOUT_Bx for

electrical characteristics

V(VIN_Bx) – VOUT, IOUT_Bx ≤ 2 A

0.8

V(VIN_Bx) – VOUT, IOUT_Bx > 2 A

DC output voltage

accuracy, includes

voltage reference, DC

load and line regulations,

process and temperature

Force PWM mode, VOUT ˂ 1.0 V

–20

Force PWM mode, VOUT ≥ 1.0 V

–2%

PFM mode, VOUT ˂ 1.0 V, the average output

voltage level is increased by max. 20 mV

–20

PFM mode, VOUT ≥ 1.0 V, the average output

voltage level is increased by max. 20 mV

–2%

2% + 20mV

Ripple voltage

PWM mode, VOUT = 1.2 V, fSW = 4 MHz,

COUT = 22 + 22 µF (GCM31CR71A226KE02)

mVp-p

PFM mode, L = 0.47 µH, COUT = 22 + 22 µF

(GCM31CR71A226KE02)

DCLNR

DC line regulation

IOUT = IOUT(max)

±0.05

%/V

DCLDR

DC load regulation in

PWM mode

VOUT_Bx = 1.0 V, IOUT from 0 to IOUT(max)

0.3%

TLDSR

Transient load step

response

IOUT = 0 A to 3 A, TR = TF = 1 µs, PWM

mode, VVIN_Bx = 3.3V, VOUT_Bx = 1.2 V, COUT

= 22 + 22 µF, L = 0.47 µH, fSW = 4 MHz

±65

TLNSR

Transient line response

V(VIN_Bx) stepping 3 V ↔ 3.5 V, TR = TF = 10

µs, IOUT = IOUT(max)

±20

ILIM FWD

Forward current limit for

both bucks (peak for

every switching cycle)

Programmable range

1.5

4.5

Step size

0.5

Accuracy, V(VIN_Bx) ≥ 3 V, ILIM = 4 A

–5%

7.5%

20%

Accuracy, 2.8 V ≤ V(VIN_Bx) < 3 V, ILIM = 4 A

–20%

7.5%

20%

ILIM NEG

Negative current limit

1.6

RDS(ON)

BUCK HS

FET

On-resistance, high-side

FET

Each phase, between VIN_Bx and SW_Bx

pins (I = 1.0 A)

110

mΩ

RDS(ON)

BUCK LS

FET

On-resistance, low-side

FET

Each phase, between SW_Bx and PGND_Bx

pins (I = 1.0 A)

mΩ

ƒSW

Switching frequency,

PWM mode

OTP programmable

2-MHz setting or VOUT_Bx < 0.8 V

1.8

2.2

MHz

3-MHz setting and VOUT_Bx ≥ 0.8 V

2.7

3.3

4-MHz setting and VOUT_Bx ≥ 1.1 V

3.6

4.4

Start-up time (soft start)

From ENx to VOUT_Bx = 0.35 V (slew-rate

control begins)

120

µs

Overshoot during start-up

Output voltage slew-

rate(4)

SLEW_RATEx[2:0] = 010, VVOUT_Bx ≥ 0.7 V

–15%

15% mV/µs

Output voltage slew-

rate(4)

SLEW_RATEx[2:0] = 011, VVOUT_Bx ≥ 0.7 V

–15%

7.5

15% mV/µs

Output voltage slew-

rate(4)

SLEW_RATEx[2:0] = 100, VVOUT_Bx ≥ 0.7 V

–15%

3.8

15% mV/µs

Output voltage slew-

rate(4)

SLEW_RATEx[2:0] = 101, VVOUT_Bx ≥ 0.7 V

–15%

1.9

15% mV/µs

Output voltage slew-

rate(4)

SLEW_RATEx[2:0] = 110, VVOUT_Bx ≥ 0.7 V

–15%

0.94

15% mV/µs

Output voltage slew-

rate(4)

SLEW_RATEx[2:0] = 111, VVOUT_Bx ≥ 0.7 V

–15%

0.47

15% mV/µs

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LP87702

SNVSBU3 – MARCH 2021

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