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LP87702 数据表(PDF) 13 Page - Texas Instruments

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部件名 LP87702
功能描述  LP87702 Dual Buck Converter and 5-V Boost With Diagnostic Functions
PDF  98 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

LP87702 数据表(HTML) 13 Page - Texas Instruments

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See (1).
MIN
MAX
UNIT
tfDA
Fall time of SDA signal
Standard mode
250
ns
Fast mode
20+0.1 Cb
250
Fast mode +
20+0.1 Cb
120
High-speed mode, Cb = 100 pF
10
80
High-speed mode, Cb = 400 pF
20
160
trCL
Rise time of SCL signal
Standard mode
1000
ns
Fast mode
20+0.1 Cb
300
Fast mode +
120
High-speed mode, Cb = 100 pF
10
40
High-speed mode, Cb = 400 pF
20
80
trCL1
Rise time of SCL signal after
a repeated start condition and
after an acknowledge bit
Standard mode
1000
ns
Fast mode
20+0.1 Cb
300
Fast mode +
120
High-speed mode, Cb = 100 pF
10
80
High-speed mode, Cb = 400 pF
20
160
tfCL
Fall time of a SCL signal
Standard mode
300
ns
Fast mode
20+0.1 Cb
300
Fast mode +
20+0.1 Cb
120
High-speed mode, Cb = 100 pF
10
40
High-speed mode, Cb = 400 pF
20
80
Cb
Capacitive load for each bus
line (SCL and SDA)
400
pF
tSP
Pulse width of spike
suppressed (Spikes shorter
than indicated width are
suppressed)
Fast mode, Fast mode +
50
ns
High-speed mode
10
(1)
Cb refers to the capacitance of one bus line. Cb is expressed in pF units.
SCL
SDA
tLOW
trCL
tHD;DAT
tHIGH
tfCL
tSU;DAT
tSU;STA
tSU;STO
START
REPEATED
START
STOP
tHD;STA
START
tSP
trDA
tBUF
tfDA
tHD;STA
S
RS
P
S
Figure 6-1. I2C Timing
www.ti.com
LP87702
SNVSBU3 – MARCH 2021
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
13
Product Folder Links: LP87702



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