F28384SPTPQR datasheet(55/306 Pages) TI

55 / 306 page

Table 6-3. Digital Signals (continued)

SIGNAL NAME

DESCRIPTION

TYPE

GPIO

337 BGA

176 Pin

EMIF2_D1

External memory interface 2 data line 1

I/O

137, 67

B19, T18

132

EMIF2_D2

External memory interface 2 data line 2

I/O

136, 66

K17, T17

112

EMIF2_D3

External memory interface 2 data line 3

I/O

135, 65

K16, U18

111

EMIF2_D4

External memory interface 2 data line 4

I/O

134, 64

L17, V18

110

EMIF2_D5

External memory interface 2 data line 5

I/O

132, 63

J16, W18

109

EMIF2_D6

External memory interface 2 data line 6

I/O

131, 62

J17, V10

108

EMIF2_D7

External memory interface 2 data line 7

I/O

130, 61

L16, U10

107

EMIF2_D8

External memory interface 2 data line 8

I/O

129, 60

M17, T10

105

EMIF2_D9

External memory interface 2 data line 9

I/O

128, 59

M16, W9

104

EMIF2_D10

External memory interface 2 data line 10

I/O

127, 58

N17, V9

103

EMIF2_D11

External memory interface 2 data line 11

I/O

126, 57

N18, U9

102

EMIF2_D12

External memory interface 2 data line 12

I/O

125, 56

N16, T9

101

EMIF2_D13

External memory interface 2 data line 13

I/O

124, 55

P19, V8

100

EMIF2_D14

External memory interface 2 data line 14

I/O

123, 54

P18, U8

EMIF2_D15

External memory interface 2 data line 15

I/O

122, 53

P17, T8

EMIF2_DQM0

External memory interface 2 Input/output mask for byte

EMIF2_DQM1

External memory interface 2 Input/output mask for byte

ENET_MDIO_CLK

EMAC management data clock, Output in MII/RMII

modes, Input in RevMII mode

I/O

105, 42

D19, J3

130

ENET_MDIO_DATA

EMAC management data

I/O

106, 43

C19, L2

131

ENET_MII_COL

EMAC MII collision detect

110, 35,

39, 41

M2, T14,

U17,

W17

71, 86,

ENET_MII_CRS

EMAC MII carrier sense

109, 34,

38, 40

N2, T16,

U14, V17

70, 85,

ENET_MII_INTR

EMAC PHY interrupt, Input in MII/RMII mode, Output

in RevMII mode

I/O

108, 68

C18, L4

133

ENET_MII_RX_CLK

EMAC MII receive clock

111, 49,

67, 69

B18, B19,

M4, R17

132, 134,

ENET_MII_RX_DATA0

EMAC MII / RMII receive data 0

114, 52,

63, 66,

B17, J16,

K17, N3,

P16

109, 112,

136, 96

ENET_MII_RX_DATA1

EMAC MII / RMII receive data 1

115, 53,

64, 72

B16, L17,

P17, V12

110, 139,

ENET_MII_RX_DATA2

EMAC MII receive data 2

116, 54,

K16, P18,

W10

111, 98

ENET_MII_RX_DATA3

EMAC MII receive data 3

117, 55,

K17, P19,

U12

100, 112

ENET_MII_RX_DV

EMAC MII receive data valid (or) RMII carrier sense/

receive data valid

112, 38,

50, 64,

A17, L17,

M3, R18,

T16

110, 135,

85, 94

ENET_MII_RX_ERR

EMAC MII / RMII receive error

113, 39,

51, 65,

71, 76

B17,

C16,

K16, N4,

R19,

W17

111, 136,

143, 86,

ENET_MII_TX_CLK

EMAC MII transmit clock

120, 44,

K18,

N17, U15

103, 113

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TMS320F28388D, TMS320F28386D, TMS320F28386D-Q1

TMS320F28384D, TMS320F28384D-Q1, TMS320F28388S

TMS320F28386S, TMS320F28386S-Q1, TMS320F28384S, TMS320F28384S-Q1

SPRSP14D – MAY 2019 – REVISED FEBRUARY 2021

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