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F28384SPTPQR 数据表(PDF) 7 Page - Texas Instruments |
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F28384SPTPQR 数据表(HTML) 7 Page - Texas Instruments |
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7 / 306 page ![]() Changes from May 18, 2020 to November 7, 2020 (from Revision B (May 2020) to Revision C (November 2020)) Page • Global: Updated the numbering format for tables, figures, and cross-references throughout the document.... 1 • Global: Added 176-pin PowerPAD™ Thermally Enhanced Low-profile Quad Flatpack (HLQFP) [PTP suffix]. 1 • Section 1 (Features): Updated Package options. .............................................................................................. 1 • Section 3 (Description): Updated section and Device Information table. ...........................................................2 • Figure 3-1 (Functional Block Diagram): Updated figure..................................................................................... 4 • Section 5 (Device Comparison): Updated Device Comparison table. Added 176-pin PTP to Temperature Options. Updated EMIF2 (16-bit). Updated GPIO I/O pins. Updated Input channels for ADC 16-bit mode. Updated Input channels for ADC 12-bit mode. Appended "(UART-compatible)" to "Serial Communications Interface (SCI) - Type 0"..................................................................................................................................... 8 • Figure 6-6 (176-Pin PTP PowerPAD Thermally Enhanced Low-Profile Quad Flatpack (Top View)): Added figure................................................................................................................................................................. 11 • Section 6.2 (Pin Attributes): Updated Pin Attributes table. Added data for 176-pin package. ......................... 17 • Table 6-2 (Analog Signals): Added data for 176-pin package. ........................................................................ 50 • Table 6-3 (Digital Signals): Added data for 176-pin package. ..........................................................................50 • Table 6-4 (Power and Ground): Added data for 176-pin package. .................................................................. 50 • Table 6-5 (Test, JTAG, and Reset): Added data for 176-pin package. ............................................................ 50 • Section 7.2 (ESD Ratings – Commercial): Added data for 176-pin PTP package. ......................................... 88 • Section 7.3 (ESD Ratings – Automotive): Added data for 176-pin PTP package. ...........................................88 • Section 7.8 (Thermal Resistance Characteristics for PTP Package): Added section. .....................................96 • Section 7.10.2.2.2 (Reset (XRSn) Switching Characteristics): Added tboot-flash................................................99 • Figure 7-5 (Power-on Reset): Added tboot-flash..................................................................................................99 • Section 7.10.4 (Flash Parameters): Updated Erase Times in Flash Parameters table.................................. 109 • Section 7.10.5 (Emulation/JTAG): Updated URL of "Hardware Breakpoints and Watchpoints for C28x in CCS"............................................................................................................................................................... 110 • Figure 7-27 (Analog Subsystem Block Diagram (176-Pin PTP)): Added figure............................................. 130 • Section 7.11.2.1 (Result Register Mapping): Added section.......................................................................... 134 • Section 7.11.2.3.2 (ADC Characteristics (16-bit Differential)): Added footnote about load current on VREFHI... 138 • Section 7.11.2.3.6 (ADC Characteristics (12-bit Single-Ended)): Updated table............................................138 • Figure 7-33 (ADC Timings for 12-Bit Mode): Updated tINT............................................................................. 147 • Section 7.13.1 (Controller Area Network (CAN)): Updated Note about the accuracy of the on-chip zero-pin oscillator .........................................................................................................................................................180 • Figure 7-76 (SCI Block Diagram): Updated figure.......................................................................................... 207 • Section 7.14.2.1.1 (MAC Tx and Rx Features): Updated "Support Ethernet packet timestamping ..." feature.... 225 • Figure 8-1 (Functional Block Diagram): Updated figure................................................................................. 245 • Figure 10-2 (Package Symbolization): Updated figure................................................................................... 292 • Section 10.3 (Tools and Software): Updated section......................................................................................293 • Section 10.4 (Documentation Support): Updated section...............................................................................294 • Section 11.1 (Packaging Information): Updated section. ...............................................................................296 www.ti.com TMS320F28388D, TMS320F28386D, TMS320F28386D-Q1 TMS320F28384D, TMS320F28384D-Q1, TMS320F28388S TMS320F28386S, TMS320F28386S-Q1, TMS320F28384S, TMS320F28384S-Q1 SPRSP14D – MAY 2019 – REVISED FEBRUARY 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 7 Product Folder Links: TMS320F28388D TMS320F28386D TMS320F28386D-Q1 TMS320F28384D TMS320F28384D-Q1 TMS320F28388S TMS320F28386S TMS320F28386S-Q1 TMS320F28384S TMS320F28384S-Q1 |
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