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F28384SPTPQR 数据表(PDF) 89 Page - Texas Instruments |
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F28384SPTPQR 数据表(HTML) 89 Page - Texas Instruments |
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89 / 306 page ![]() 7.5 Power Consumption Summary Current values listed in this section are representative for the test conditions given and not the absolute maximum possible. The actual device currents in an application will vary with application code and pin configurations. Section 7.5.1 lists the system current consumption values for an external supply. 7.5.1 System Current Consumption (External Supply) over operating free-air temperature range (unless otherwise noted). TYP : Vnom, 30℃ PARAMETER TEST CONDITIONS MIN TYP MAX UNIT OPERATING MODE IDD VDD current consumption during operational usage(3) See Section 7.5.2. 288 475 mA IDDIO VDDIO current consumption during operational usage(2) 45 mA IDDA VDDA current consumption during operational usage 8 15 mA IDLE MODE IDD VDD current consumption while device is in Idle mode(3) CPU is in IDLE mode • Flash is powered down • XCLKOUT is turned off 90 265 mA IDDIO VDDIO current consumption while device is in Idle mode(2) 4 7 mA IDDA VDDA current consumption while device is in Idle mode 0.002 0.010 mA STANDBY MODE IDD VDD current consumption while device is in Standby mode(3) CPU is in STANDBY mode • Flash is powered down • XCLKOUT is turned off 30 200 mA IDDIO VDDIO current consumption while device is in Standby mode(2) 4 7 mA IDDA VDDA current consumption while device is in Standby mode 0.002 0.010 mA FLASH ERASE/PROGRAM IDD VDD Current consumption during Erase/ Program cycle(1) (3) CPU is running from Flash, performing Erase and Program on the unused sector. • SYSCLK is running at 200 MHz. • I/Os are inputs with pullups enabled. • Peripheral clocks are turned OFF. 242 360 mA IDDIO VDDIO Current consumption during Erase/ Program cycle(1) (2) 56 75 mA IDDA VDDA Current consumption during Erase/ Program cycle 0.01 0.15 mA RESET MODE IDD VDD current consumption while held in reset via XRSn(3) CPU is held in reset via external low signal driven onto XRSn • XRSn held low through power-up 55 mA IDDIO VDDIO current consumption while held in reset via XRSn(2) CPU is held in reset via external low signal driven onto XRSn • XRSn held low through power-up 15 mA IDDA VDDA current consumption while held in reset via XRSn CPU is held in reset via external low signal driven onto XRSn • XRSn held low through power-up 0.05 mA (1) Brown-out events during flash programming can corrupt flash data and permanently lock the device. Programming environments using alternate power sources (such as a USB programmer) must be capable of supplying the rated current for the device and other system components with sufficient margin to avoid supply brown-out conditions. (2) Includes current consumption for VDD3VFL supply (VDDIO + VDD3VFL). (3) VDD current values in this table do not include the 21-mA current from VDD to VSS through the 56Ω resistor that is mentioned in the Signal Descriptions section www.ti.com TMS320F28388D, TMS320F28386D, TMS320F28386D-Q1 TMS320F28384D, TMS320F28384D-Q1, TMS320F28388S TMS320F28386S, TMS320F28386S-Q1, TMS320F28384S, TMS320F28384S-Q1 SPRSP14D – MAY 2019 – REVISED FEBRUARY 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 89 Product Folder Links: TMS320F28388D TMS320F28386D TMS320F28386D-Q1 TMS320F28384D TMS320F28384D-Q1 TMS320F28388S TMS320F28386S TMS320F28386S-Q1 TMS320F28384S TMS320F28384S-Q1 |
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