ADRF6612ACPZ-R7 datasheet(38/57 Pages) AD

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ADRF6612

Data Sheet

Rev. A | Page 38 of 57

IFA_MAIN

IFA_LIN = 0

IFA_LIN = 1

IFA_LIN = 2

IFA_LIN = 3

IFA_LIN = 4

IFA_LIN = 5

IFA_LIN = 6

IFA_LIN = 7

IFA_LIN = 8

IFA_LIN = 9

IFA_LIN = 10

IFA_LIN = 11

IFA_LIN = 12

IFA_LIN = 13

IFA_LIN = 14

Figure 101. IIP3 vs. Main (IFA_MAIN) and Linearity Bias (IFA_LIN) Level

at IF Frequency = 200 MHz

VGS PROGRAMMING

The ADRF6612 allows programmability for internal gate-to-source

voltages for optimizing mixer performance over the desired

frequency bands. The ADRF6612 default VGS setting is 0. Both

channels of the ADRF6612 are programmed together using the

same VGS setting. Power conversion gain, input IP3 NF, and input

P1dB can be optimized, as shown in Figure 40, Figure 41,

Figure 43, and Figure 44.

LOW-PASS FILTER PROGRAMMING

The ADRF6612 allows programmability for the low-pass filter

terminating the mixer output. This filter helps to block sum term

mixing products at the expense of some noise figure and gain

and can significantly increase input IP3. The ADRF6612 default

LPF setting is 0. Both channels of the ADRF6612 are programmed

together using the same LPF settings. Power conversion gain,

input IP3, NF, and input P1dB can be optimized, as shown in

Figure 42, Figure 45, Figure 46, and Figure 49.

ADRF6612ACPZ-R7 数据表(PDF) 38 Page - Analog Devices

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