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ADRF6614ACPZ-R7 数据表(PDF) 39 Page - Analog Devices |
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ADRF6614ACPZ-R7 数据表(HTML) 39 Page - Analog Devices |
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39 / 61 page  Data Sheet ADRF6614 Rev. 0 | Page 39 of 61 BASIC CONNECTIONS BY PIN DESCRIPTION Table 23. Basic Connections Pin No. Mnemonic Description Basic Connection 5 V Power Decouple to GND with a 10 µF, a 0.1 µF, and a 10 pF capacitor as close to the pin as possible. 7 VCC1 5 V VCO supply 16 VCC2 5 V supply for SPI port 20, 41 VCC3, VCC11 5 V biases for IF Channel 2 and IF Channel 1 27, 28, 29, 32, 33, 34 VCC4, VCC5, VCC6, VCC8, VCC9, VCC10 5 V supplies for mixer LO amplifier 31 VCC7 5 V supply for mixer LO divider chain 46 VCC12 5 V supply for internal PLL Internal LDO Nodes Decouple to GND with a 10 µF and a 100 pF capacitor, as close to the pin as possible. 8, 9 DECL1, DECL2 VCO LDO outputs 10, 11, 12 DECL3, DECL4, DECL5 External decoupling for VCO circuitry 15 LDO1 External decoupling for internal 2.5 V SPI LDO 30 LDO2 External decoupling for internal 3.3 V PLL/divider LDO 44 LDO3 External decoupling for internal 2.5 V PLL LDO 45 LDO4 External decoupling for internal 3.3 V PLL LDO GND Connect directly to the PCB ground through a low impedance connection. 1 GND External loop filter ground 3, 6 GND Common ground for external loop filter 24, 37 GND IF stage, Channel 2 and Channel 1 ground 48 GND External charge pump ground SPI 17 SDIO SPI port data input/output 18 SCLK SPI port clock 19 CS SPI port chip select RF, Mixer, IF Path 4, 5 EXTVCOIN+, EXTVCOIN− External VCO or LO inputs DC block with 100 pF capacitors. 13, 14 LOOUT+, LOOUT− Differential LO outputs DC block with 100 pF capacitors. 22, 23 IFOUT2+, IFOUT2− Channel 2 differential IF outputs Bias to 5 V supply with 330 nH inductors and dc block with 150 pF capacitors. 25 RFBCT2 Internal mixer bias control for Channel 2 RF input Decouple to GND with a 10 pF and a 10 nF capacitor, as close to the pin as possible. 26 RFIN2 Channel 2 single-ended RF input DC block with a 22 pF capacitor. 36 RFBCT1 Internal mixer bias control for Channel 1 RF input Decouple to GND with a 10 pF and a 10 nF capacitor, as close to the pin as possible. 35 RFIN1 Channel 1 single-ended RF input DC block with a 22 pF capacitor. 38, 39 IFOUT1−, IFOUT1+ Channel 1 differential IF outputs Bias to 5 V supply with 330 nH inductors and dc block with 150 pF capacitors. PLL/VCO 2 VCOVTUNE Control voltage for internal VCO Output from external loop filter. 43 REFIN External reference for internal PLL 47 CPOUT Charge pump output Input to external loop filter. Other 42 MUXOUT Output for various internal analog signals, including PLL lock detect and voltage proportional to absolute temperature (VPTAT ) Can be read directly from the pin; the user must be careful of loading effects; not a low impedance output. 21, 40 DNC Do not connect |
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