ADRF6614ACPZ-R7 datasheet(1/61 Pages) AD

部件名	ADRF6614ACPZ-R7

功能描述	700 MHz to 3000 MHz, Dual Passive Receive Mixer with Integrated PLL and VCO

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700 MHz to 3000 MHz, Dual Passive

Receive Mixer with Integrated PLL and VCO

Data Sheet

ADRF6614

Rev. 0

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FEATURES

RF frequency: 700 MHz to 3000 MHz, continuous

LO input frequency: 200 MHz to 2700 MHz, high-side or low-

side injection

IF range: 40 MHz to 500 MHz

Power conversion gain of 9.0 dB

Phase noise performance of −144 dBc/Hz at 800 kHz offset

supporting stringent GSM standards in both 800 MHz to

900 MHz and 1800 MHz to 1900 MHz bands

Single-sideband (SSB) noise figure of 11.3 dB

Input IP3 of 30 dBm

Input P1dB of 10.6 dBm

Typical LO input drive of 0 dBm

Single-ended, 50 Ω RF port

Single-ended or balanced LO input port

Serial port interface (SPI) control on all functions

Exposed pad, 7 mm × 7 mm, 48-lead LFCSP

APPLICATIONS

Multiband/multistandard cellular base station diversity receivers

Wideband radio link diversity downconverters

Multimode cellular extenders and picocells

FUNCTIONAL BLOCK DIAGRAM

GND

SPI

CONTROL

÷1 TO

32

PLL REF BUFFER

PFD/CP

FRACTIONAL DIVIDER

PLL

3.3V

LDO

VCO

LDO

SPI

2.5V

LDO

DIV

3.3V

LDO

VCO

VCC10

GND

VCC1

EXTVCOIN+

EXTVCOIN–

DECL1

DECL2

DECL3

DECL4

DECL5

VCC9

VCC8

RFBCT1

RFIN1

VCC7

LDO2

RFIN2

RFBCT2

VCC6

VCC5

VCC4

42

43

47

37

40

38

39

41

48

44

45

46

2

1

3

6

34

33

36

35

31

30

26

25

29

28

27

32

7

9

8

5

4

10

11

12

14

15

16

17

18

19

22

23

20

21 24

13

ADRF6614

Figure 1.

GENERAL DESCRIPTION

The ADRF6614 is a dual radio frequency (RF) mixer and

intermediate frequency (IF) amplifier with an integrated phase-

locked loop (PLL) and voltage controlled oscillators (VCOs). The

ADRF6614 uses revolutionary broadband square wave limiting

local oscillator (LO) amplifiers to achieve a wideband RF bandwidth

of 700 MHz to 3000 MHz. Unlike narrow-band sine wave LO

amplifier solutions, the LO can be applied above or below the RF

input over a wide bandwidth. Energy storage elements are not

utilized in the LO amplifier, thus dc current consumption also

decreases with decreasing LO frequency.

The ADRF6614 utilizes highly linear, doubly balanced passive

mixer cores with integrated RF and LO balancing circuits to

allow single-ended operation. Integrated RF baluns allow optimal

performance over the 700 MHz to 3000 MHz RF input frequency.

The balanced passive mixer arrangement provides outstanding LO

to RF and LO to IF leakages, excellent RF to IF isolation, and

excellent intermodulation performance over the full RF bandwidth.

The balanced mixer cores provide extremely high input linearity,

allowing the device to be used in demanding wideband applications

where in-band blocking signals may otherwise result in the degra-

dation of dynamic range. Noise performance under blocking is

comparable to narrow-band passive mixer designs. High linearity

IF buffer amplifiers follow the passive mixer cores, yielding

typical power conversion gains of 9.0 dB, and can be matched

to a wide range of output impedances.

The PLL architecture supports both integer-N and fractional-N

operation and can generate the entire LO frequency range of

200 MHz to 2700 MHz using an external reference input frequency

anywhere in the range of 12 MHz to 320 MHz. An external loop

filter provides flexibility in trading off phase noise vs. acquisition

time. To reduce fractional spurs in fractional-N mode, a Σ-Δ

modulator controls the post VCO-programmable divider. The

device integrates six VCO cores, four of which provide complete

frequency coverage between 200 MHz and 2700 MHz, and meet

the GSM phase noise requirements in the 800 MHz and 900 MHz

bands. Two additional GSM only cores enable the ADRF6614 to

meet the GSM phase noise requirements in the digital cellular

system 1800 MHz (DCS1800) and personal communications

service 1900 MHz (PCS1900) bands.

All features of the ADRF6614 are controlled via a 3-wire SPI,

resulting in optimum performance and minimum external

components.

The ADRF6614 is fabricated using a BiCMOS, high performance

IC process. The device is available in a 7 mm × 7 mm, 48-lead

LFCSP package and operates over a −40°C to +85°C temperature

range. An evaluation board is available.

类似零件编号 - ADRF6614ACPZ-R7

制造商	部件名	数据表	功能描述
Analog Devices	ADRF6612	2Mb / 57P	700 MHz to 3000 MHz Dual Passive Receive Mixer with Integrated PLL and VCO 5/2016-Rev. 0 to Rev. A
	ADRF6612-EVALZ	2Mb / 57P	700 MHz to 3000 MHz Dual Passive Receive Mixer with Integrated PLL and VCO 5/2016-Rev. 0 to Rev. A
	ADRF6612ACPZ-R7	2Mb / 57P	700 MHz to 3000 MHz Dual Passive Receive Mixer with Integrated PLL and VCO 5/2016-Rev. 0 to Rev. A

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