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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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LPS27HHTW 数据表(PDF) 25 Page - STMicroelectronics |
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LPS27HHTW 数据表(HTML) 25 Page - STMicroelectronics |
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25 / 55 page  7.3.2 SPI write Figure 20. SPI write protocol CS SPC SDI RW DI7 DI6 DI5 DI4 DI3 DI2 DI1 DI0 AD5 AD4 AD3 AD2 AD1 AD0 AD6 The SPI write command is performed with 16 clock pulses. The multiple byte write command is performed by adding blocks of 8 clock pulses to the previous one. bit 0: WRITE bit. The value is 0. bit 1-7: address AD(6:0). This is the address field of the indexed register. bit 8-15: data DI(7:0) (write mode). This is the data that is written in the device (MSb first). bit 16-...: data DI(...-8). Further data in multiple byte writes. Figure 21. Multiple byte SPI write protocol (2-byte example) CS SPC SDI RW AD5 AD4 AD3 AD2 AD1 AD0 DI7 DI6 DI5 DI4 DI3 DI2 DI1 DI0 DI15 DI14 DI13 DI12 DI11 DI10 DI9 DI8 AD6 LPS27HHTW SPI bus interface (CS = low) DS13489 - Rev 1 page 25/55 |
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