ADRF6806ACPZ-R7 datasheet(5/36 Pages) AD

部件名	ADRF6806ACPZ-R7

功能描述	50 MHz to 525 MHz Quadrature Demodulator with Fractional-N PLL and VCO

PDF	36 Pages

Scroll/Zoom	100%

制造商	AD [Analog Devices]

网页	http://www.analog.com

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5 / 36 page

Data Sheet

ADRF6806

Rev. B | Page 5 of 36

Parameter

Test Conditions/Comments

Min

Typ

Max

Unit

Supply Current (5 V) (LPEN = 1)

Normal Rx mode

Rx mode with LO buffer enabled

Supply Current (5 V)

Power-down mode

Supply Current (3.3 V)

Power-down mode

TIMING CHARACTERISTICS

VS1 (VVCCBB and VVCCRF) = 5 V, and VS2 (VVCC1, VVCC2, and VVCCLO) = 3.3 V.

Table 2.

Parameter

Limit at TMIN to TMAX (B Version)

Unit

Test Conditions/Comments

ns min

LE Setup Time

ns min

DATA to CLK setup time

ns min

DATA to CLK hold time

ns min

CLK high duration

ns min

CLK low duration

ns min

CLK to LE setup time

ns min

LE pulse width

CLOCK

DATA

DB23 (MSB)

DB22

DB2

DB1

(CONTROL BIT C2)

DB0 (LSB)

(CONTROL BIT C1)

Figure 2. Timing Diagram

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