24CS512 datasheet(24/66 Pages) MICROCHIP

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24CS512

DS20005769C-page 24

 2018-2021 Microchip Technology Inc.

9.0

CONFIGURATION REGISTER

The 24CS512 device contains a 16-bit Configuration

address and word address. If desired, the Configura-

tion register can be locked so that it is set to read-only

and can no longer be modified, thereby making the

current data protection scheme permanent.

9.1

Accessing the Configuration

The value of the Configuration register can be

determined by executing a random read sequence to a

specific address. Changing the value of the Configura-

tion register is accomplished with a byte write sequence

with the requirements outlined later in this section.

Accessing this register requires the use of ‘1011b’ (Bh)

as the device type identifier in the device address (see

Table 9-1). Following the device type identifier are the

hardware client address bits for which the values are

determined by the device address input pins, A2, A1

and A0 (see Section 2.0 “Pin Descriptions”). Finally,

bit 0 is the Read/Write Select (R/W) bit, where a logic

‘1’ is used for reading and a logic ‘0’ is used for writing.

When accessing the Configuration register, a 16-bit

word address must be sent to the device. All bits in the

word address are ignored except for bits A15, A11 and

A10. Bits A15 and A11 must be set to logic ‘1’ and bit

A10 must be set to logic ‘0’. Refer to Table 9-2 and

Table 9-3 for additional information.

TABLE 9-1:

CONFIGURATION REGISTER DEVICE ADDRESS BYTE

Memory Region

Device Type Identifier

Hardware Address Bits(1)

Read/Write

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Configuration Register

1011

R/W

Note 1: The hardware client address bits must be set to logic ‘0’ when using the SOT-23 package.

TABLE 9-2:

CONFIGURATION REGISTER WORD ADDRESS BYTE 0

Word Address

A15

A14

A13

A12

A11

A10

Word Address Byte 0

1xxx10x

TABLE 9-3:

CONFIGURATION REGISTER WORD ADDRESS BYTE 1

Word Address

Word Address Byte 1

xxxxxxx

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