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24CS512 数据表(PDF) 27 Page - Microchip Technology

部件名 24CS512
功能描述  512-Kbit, 3.4MHz I2C Serial EEPROM with 128-Bit Serial Number and Enhanced Software Write Protection
PDF  66 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

24CS512 数据表(HTML) 27 Page - Microchip Technology

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 2018-2021 Microchip Technology Inc.
DS20005769C-page 27
24CS512
9.3
Writing to the Configuration
Register
When writing to the Configuration register, a write
sequence must be sent to the device (see Section 6.1
“Byte Write” for additional information). The data
address values must be compliant with the values
found in Table 9-1, Table 9-2 and Table 9-3.
In order for the internal write process to start, both data
bytes (Byte 0 and Byte 1), along with a confirmation
byte, need to be sent to the device. Sending anything
other than these three bytes will cause the write cycle
to abort and the contents of the Configuration register
will not be changed.
The data of the confirmation byte depends on the value
being written to the LOCK bit. If the user intends to lock
the Configuration register (LOCK = 1), the confirmation
byte must be 99h. If the user intends to leave the
register unlocked (LOCK = 0), the confirmation byte
must be 66h.
Table 9-4 illustrates the valid data values for the confir-
mation byte. Figure 9-1 illustrates the Configuration
register write sequence.
FIGURE 9-1:
CONFIGURATION REGISTER WRITE SEQUENCE
Note:
Writing to the Configuration register can-
not
be
inhibited
by
asserting
the
Write-Protect pin. Refer to Section 6.6
“Write Protection”, which describes the
device behavior with respect to the
Write-Protect pin status.
Note:
If an attempt is made to write to the Con-
figuration register after the Configuration
register has been locked, the device will
acknowledge the commands, but no write
cycle will occur, no data will be written and
the device will immediately accept a new
command.
Note:
The Configuration register cannot be
unlocked once it is locked.
TABLE 9-4:
CONFIGURATION REGISTER CONFIRMATION BYTE
New LOCK Bit Value
D7
D6
D5
D4
D3
D2
D1
D0
1 (locked)
100
110
01
0 (unlocked)
011
001
10
SCL
MSb
MSb
MSb
SDA
1
2
34
5
6
7
8
91
2
3
4
5
6
7
8
9
12
34
5
6
7
8
9
Word Address – Byte 1
Word Address – Byte 0
Device Address Byte
10
1
1
0
0
1
xx
x1
0
x
x
0
x
x
x
x
x
x
0
xx
A2 A1 A0
ACK
from
Client
ACK
from
Client
ACK
from
Client
Start by
Host
MSb
MSb
MSb
12
3
4
5
6
7
8
9
123
45
6
7
8
9
1
2
3
45
6
7
8
9
Configuration Register
Configuration Register
Configuration Register
xx
x
x
0
D8
D7 D6 D5 D4 D3 D2 D1 D0 0 D7 D6 D5 D4 D3 D2
0
D1 D0
xx D9
ACK
from
Client
ACK
from
Client
ACK
from
Client
Stop by
Host
Confirmation Byte
Byte 1
Byte 0



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