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24CS512 数据表(PDF) 8 Page - Microchip Technology |
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24CS512 数据表(HTML) 8 Page - Microchip Technology |
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8 / 66 page ![]() 24CS512 DS20005769C-page 8 2018-2021 Microchip Technology Inc. 2.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 2-1. 2.1 Device Address Inputs (A0, A1 and A2) The A0, A1 and A2 inputs are used by the 24CS512 for multiple device operations. The logic levels on these inputs are compared with the corresponding bits in the client address. The chip is selected if the compare is true. Up to eight devices may be connected to the same bus by using different hardware client address bit combina- tions. These inputs must be connected to either VCC or VSS. In most applications, the device address inputs, A0, A1 and A2, are hard-wired to logic ‘0’ or logic ‘1’. For applications in which these pins are controlled by a microcontroller or other programmable logic device, the device address pins must be driven to a logic ‘0’ or a logic ‘1’ before normal device operation can proceed. 2.2 Serial Data (SDA) This is a bidirectional pin used to transfer addresses and data into and out of the device. It is an open-drain terminal; therefore, the SDA bus requires a pull-up resistor to VCC (typically 10 kΩ for 100 kHz, 2 kΩ for 400 kHz and 1 MHz and 330Ω for 3.4 MHz). For normal data transfer, SDA is allowed to change only during SCL low. Changes during SCL high are reserved for indicating the Start and Stop conditions. 2.3 Serial Clock (SCL) This input is used to synchronize the data transfer from and to the device. 2.4 Write-Protect (WP) This pin must be connected to either VSS or VCC. If tied to VSS, write operations to the memory array and Security register are enabled. If tied to VCC, write operations to the memory array and Security register are inhibited, but read operations are not affected. TABLE 2-1: PIN FUNCTION TABLE Name 8-Lead MSOP 8-Lead PDIP 8-Lead SOIC 8-Lead SOIJ 8-Lead TSSOP 5-Lead SOT-23 8-Lead UDFN(1) 8-Ball CSP Function A0 1 1 1 1 1 — 1 A5 Device Address Input A1 2 2 2 2 2 — 2 B4 Device Address Input A2 3 3 3 3 3 — 3 C3 Device Address Input VSS 44 44 424 C5 Ground SDA 5 5 5 5 5 3 5 C1 Serial Data SCL 6 6 6 6 6 1 6 B2 Serial Clock WP 77 77 757 A3 Write-Protect VCC 88 88 848 A1 Device Power Supply Note 1: The exposed pad on this package can be connected to VSS or left floating. Note: This pin is ignored when using Enhanced Software Write Protection mode and should be tied to either VCC or VSS. |
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