ADMV8818-EP

Enhanced Product

Rev. A | Page 8 of 36

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

GND

GND

GND

GND

GND

GND

RFIN

GND

GND

GND

GND

GND

GND

RST

1

2

3

29

30

31

32

33

34

35

36

37

38

39

40

41

42

4

5

6

7

8

9

10

11

12

13

14

ADMV8818-EP

TOP VIEW

(Not to Scale)

GND

NOTES

1. EXPOSED PAD. THE EXPOSED PAD MUST BE

CONNECTED TO THE RF AND DC GROUND.

VSS1 (–2.5V)

GND

VDD2 (+3.3V)

GND

GND

RFOUT

GND

GND

GND

GND

VDD1 (+2.5V)

GND

GND

Figure 3. Pin Configuration

Table 5. Pin Function Descriptions

Pin No.

Mnemonic

Description

1 to 6, 8 to 13, 15, 17, 19,

21, 23, 25 to 30, 32 to

35, 37, 38, 40, 42 to 56

GND

Ground. Connect the GND pins to the RF and dc ground.

7

RFIN

RF Input Pin. RFIN is dc-coupled and matched to 50 Ω. Do not apply an external voltage to RFIN.

14

RST

Chip Reset. 3.3 V logic. Active low. The RST pin is internally pulled high with a 260 kΩ resistor.

16

SCLK

Serial Peripheral Interface (SPI) Clock. 3.3 V logic. The SCLK pin is internally pulled low with a

260 kΩ resistor.

18

CS

SPI Chip Select. 3.3 V logic. Active low. The CS pin is internally pulled low with a 260 kΩ resistor.

20

SDO

SPI Data Output. 3.3 V logic. The SDO pin is internally pulled low with a 260 kΩ resistor.

22

SDI

SPI Data Input. 3.3 V logic. The SDI pin is internally pulled low with a 260 kΩ resistor.

24

SFL

SPI Fast Latch Enable. 3.3 V logic. Set SFL high to enable fast latching of filter states on each

rising edge of CS. While SFL is in this mode, the SCLK, SDO, and SDI pins are not active. The SFL

pin is internally pulled low with a 260 kΩ resistor.

31

VDD1

2.5 V Power Supply Pin. Place 0.1 µF and 100 pF decoupling capacitors close to VDD1.

36

RFOUT

RF Output Pin. RFOUT is dc-coupled and matched to 50 Ω. Do not apply an external voltage to RFOUT.

39

VDD2

3.3 V Power Supply Pin. Place 0.1 µF and 100 pF decoupling capacitors close to VDD2.

41

VSS1

–2.5 V Power Supply Pin. Place 0.1 µF and 100 pF decoupling capacitors close to VSS1.

EPAD

Exposed Pad. The exposed pad must be connected to the RF and dc ground.