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ADRF6521ACPZ-R7 数据表(PDF) 31 Page - Analog Devices |
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ADRF6521ACPZ-R7 数据表(HTML) 31 Page - Analog Devices |
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31 / 33 page ![]() Data Sheet ADRF6521 Rev. 0 | Page 31 of 33 APPLICATIONS INFORMATION BASIC CONNECTIONS Figure 125 shows the basic connections for a typical ADRF6521 application. SUPPLY DECOUPLING Decouple each supply pin, VPOS and VNEG, to ground with at least one low inductance, surface-mount ceramic capacitor of 0.1 µF placed as close as possible to the ADRF6521 device. INPUT SIGNAL PATH Each signal path has an input VGA, accessed through the INP1, INM1, INP2, and INM2 pins, which sets a differential input impedance of 100 Ω. The inputs can be dc-coupled or ac-coupled, but ac coupling is strongly recommended. There is no mechanism to change the common-mode voltage. Therefore, if the user wants to use dc coupling, the common-mode voltage of the previous stage must match the ADRF6521 input common-mode voltage of (VPOS + VNEG)/2 V. OUTPUT SIGNAL PATH The low impedance (20 Ω) output buffers are designed to drive a 100 Ω impedance load. However, the buffers can drive larger resistive loads. The output pins (OPP1, OPM1, OPP2, and OPM2) sit at a nominal output common-mode voltage of (VPOS + VNEG)/2 V. The outputs can be dc-coupled or ac-coupled. However, dc coupling is required to take advantage of the output dc offset voltage functionality. To change the output common- mode voltage, the user must apply a dc voltage to the VOCM pin different than (VPOS + VNEG)/2 V. Left open, VOCM defaults to (VPOS + VNEG)/2 V. To change the output dc offset voltage, the user must apply a voltage to the OFS1 and OFS2 pins different than 0.75 V. Left open, these pins are pulled to ground via an on-chip 5 kΩ resistor, which creates an approximately −670 mV dc output offset. OPP1 OPM1 VOCM VOCM 0.1µF 100pF VPOS 0.1µF 100pF GAIN 0.1µF 0.1µF 0.1µF 100pF 0.1µF 100pF VPOS 0.1µF 100pF OFS2 0.1µF 100pF VNEG 0.1µF 100pF VNEG 0.1µF 100pF OFS1 0.1µF 100pF OPP2 OPM2 INM1 COMM INP1 INP2 INPUT1 (+) INPUT1 (–) INPUT2 (+) INPUT2 (–) OUTPUT1 (+) OUTPUT1 (–) OUTPUT2 (+) OUTPUT2 (–) INM2 ADRF6521 20 19 18 17 16 6 7 8 9 10 14 13 12 15 11 2 3 4 1 5 PWD Figure 125. Basic Connections |
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