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56F8335 数据表(PDF) 28 Page - Freescale Semiconductor, Inc |
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56F8335 数据表(HTML) 28 Page - Freescale Semiconductor, Inc |
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28 / 160 page  56F8335 Technical Data, Rev. 1 28 Freescale Semiconductor Preliminary FAULTA0 67 Schmitt Input Input FAULTA0 - 2 — These three fault input pins are used for disabling selected PWMA outputs in cases where fault conditions originate off-chip. To deactivate the internal pull-up resistor, set the PWMA0 bit in the SIM_PUDR register. See Part 6.5.6 for details. FAULTA1 68 FAULTA2 69 FAULTA3 70 Schmitt Input Input FAULTA3 — This fault input pin is used for disabling selected PWMA outputs in cases where fault conditions originate off-chip. To deactivate the internal pull-up resistor, set the PWMA1 bit in the SIM_PUDR register. See Part 6.5.6 for details. PWMB0 32 Output Tri-State PWMB0 - 5 — Six PWMB output pins. PWMB1 33 PWMB2 34 PWMB3 37 PWMB4 38 PWMB5 39 ISB0 (GPIOD10) 48 Schmitt Input Schmitt Input/ Output Input Input ISB0 - 2 — These three input current status pins are used for top/bottom pulse width correction in complementary channel operation for PWMB. Port D GPIO — These GPIO pins can be individually programmed as input or output pins. At reset, these pins default to ISB functionality. To deactivate the internal pull-up resistor, clear the appropriate bit of the GPIOD_PUR register. See Part 6.5.6 for details. ISB1 (GPIOD11) 50 ISB2 (GPIOD12) 51 FAULTB0 54 Schmitt Input Input FAULTB0 - 3 — These four fault input pins are used for disabling selected PWMB outputs in cases where fault conditions originate off-chip. To deactivate the internal pull-up resistor, set the PWMB bit in the SIM_PUDR register. See Part 6.5.6 for details. FAULTB1 55 FAULTB2 56 FAULTB3 57 Table 2-2 Signal and Package Information for the 128-Pin LQFP Signal Name Pin No. Type State During Reset Signal Description |
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