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56F8335 数据表(PDF) 30 Page - Freescale Semiconductor, Inc

部件名 56F8335
功能描述  16-bit Digital Signal Controller
PDF  160 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

56F8335 数据表(HTML) 30 Page - Freescale Semiconductor, Inc

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56F8335 Technical Data, Rev. 1
30
Freescale Semiconductor
Preliminary
CAN_RX
121
Schmitt
Input
Input
FlexCAN Receive Data — This is the CAN input. This pin has
an internal pull-up resistor.
To deactivate the internal pull-up resistor, set the CAN bit in the
SIM_PUDR register.
CAN_TX
120
Open
Drain
Output
Output
FlexCAN Transmit Data — CAN output
TC0
(GPIOE8)
111
Schmitt
Input/
Output
Schmitt
Input/
Output
Input
Input
TC0 - 1 — Timer C, Channels 0 and 1
Port E GPIO — These GPIO pins can be individually
programmed as input or output pins.
At reset, these pins default to Timer functionality.
To deactivate the internal pull-up resistor, clear the appropriate
bit of the GPIOE_PUR register. See Part 6.5.6 for details.
TC1
(GPIOE9)
113
TD0
(GPIOE10)
107
Schmitt
Input/
Output
Schmitt
Input/
Output
Input
Input
TD0 - TD3 — Timer D, Channels 0, 1, 2 and 3
Port E GPIO — These GPIO pins can be individually
programmed as input or output pins.
At reset, these pins default to Timer functionality.
To deactivate the internal pull-up resistor, clear the appropriate
bit of the GPIOE_PUR register. See Part 6.5.6 for details.
TD1
(GPIOE11)
108
TD2
(GPIOE12)
109
TD3
(GPIOE13)
110
IRQA
52
Schmitt
Input
Input
External Interrupt Request A and B — The IRQA and IRQB
inputs are asynchronous external interrupt requests during Stop
and Wait mode operation. During other operating modes, they
are synchronized external interrupt requests, which indicate an
external device is requesting service. They can be programmed
to be level-sensitive or negative-edge triggered.
To deactivate the internal pull-up resistor, set the IRQ bit in the
SIM_PUDR register. See Part 6.5.6 for details.
IRQB
53
Table 2-2 Signal and Package Information for the 128-Pin LQFP
Signal
Name
Pin No.
Type
State
During
Reset
Signal Description



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