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ADP5041ACPZ-1-R7 数据表(PDF) 36 Page - Analog Devices |
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ADP5041ACPZ-1-R7 数据表(HTML) 36 Page - Analog Devices |
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36 / 40 page ![]() ADP5041 Data Sheet Rev. B | Page 36 of 40 The reliable operation of the buck regulator and the LDO regulator can be achieved only if the estimated die junction temperature of the ADP5041 (Equation 14) is less than 125°C. Reliability and mean time between failures (MTBF) is highly affected by increasing the junction temperature. Additional information about product reliability can be found in the Analog Devices, Inc., Reliability Handbook, which is available at http://www.analog.com/reliability_handbook. APPLICATION DIAGRAM ON OFF FPWM PWM/PSM RFILT 30Ω SW PGND MODE C4 10µF L1 1µH VIN1 EN3 EN1 VIN2 VIN3 EN2 AGND VOUT2 VOUT1 FB3 VOUT3 VTHR WDI nRSTO C1 4.7µF AVIN C2 1µF C3 1µF EN_BK BUCK EN_LDO1 LDO1 (DIGITAL) EN_LDO2 LDO2 (ANALOG) SUPERVISOR ON OFF ON OFF 4 20 16 13 10 7 6 3 EP 1 19 5 14 FB2 FB1 15 17 9 11 8 12 WDOG RESET PUSH-BUTTON RESET MR R2 R1 2 R7 R8 C6 2.2µF 18 VTH R9 R4 R3 VOUT1 AT 1.2A R6 R5 VDD C5 2.2µF VIN1 =2.3V TO 5.5V VIN2 =1.7V TO 5.5V VIN3 =1.7V TO 5.5V VOUT2 AT 300mA VOUT3 AT 300mA Figure 113. Application Diagram |
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