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LM5035 数据表(PDF) 20 Page - National Semiconductor (TI) |
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LM5035 数据表(HTML) 20 Page - National Semiconductor (TI) |
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20 / 28 page ![]() Applications Information (Continued) the power converter as shown in Figure 10. When the UVLO pin voltage falls below the 1.25V threshold, an internal 23 µA current sink is enabled to lower the voltage at the UVLO pin, thus providing threshold hysteresis. Resistance values for R1 and R2 can be determined from the following equations. where V PWR is the desired turn-on voltage and VHYS is the desired UVLO hysteresis at V PWR. For example, if the LM5035 is to be enabled when V PWR reaches 34V, and disabled when VPWR is decreased to 32V, R1 should be 87k Ω, and R2 should be 3.54kΩ. The voltage at the UVLO pin should not exceed 7V at any time. Be sure to check both the power and voltage rating (0603 resistors can be rated as low as 50V) for the selected R1 resistor. 20177529 FIGURE 10. Basic UVLO Configuration 20177530 FIGURE 11. Basic Over-Voltage Protection www.national.com 20 |
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