LM5035 datasheet(24/28 Pages) NSC

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Applications Information (Continued)

In the case of continuous cycle-by-cycle current limit detec-

tion at the CS pin, the time required for C

RES to reach the

2.5V hiccup mode threshold is:

For example, if C

RES = 0.01µF the time t1 is approximately

1.14 ms.

The cool down time, t2 is set by the soft-start capacitor (C

SS)

and the internal 1µA SS current source, and is equal to:

If C

SS = 0.01 µF t2 is

)10 ms.

The soft-start time t3 is set by the internal 55µA current

source, and is equal to:

If C

SS = 0.01 µF t3 is

)730µs.

The time t2 provides a periodic cool-down time for the power

converter in the event of a sustained overload or short

circuit. This off time results in lower average input current

and lower power dissipation within the power components. It

is recommended that the ratio of t2 / (t1 + t3) be in the range

of 5 to 10 to take advantage of this feature.

If the application requires no delay from the first detection of

a current limit condition to the onset of the hiccup mode (t1 =

0), the RES pin can be left open (no external capacitor). If it

is desired to disable the hiccup mode entirely, the RES pin

should be connected to ground (AGND).

Printed Circuit Board Layout

The LM5035 Current Sense and PWM comparators are very

fast, and respond to short duration noise pulses. The com-

ponents at the CS, COMP, SS, OVP, UVLO, DLY and the RT

pins should be as physically close as possible to the IC,

thereby minimizing noise pickup on the PC board tracks.

Layout considerations are critical for the current sense filter.

If a current sense transformer is used, both leads of the

transformer secondary should be routed to the sense filter

components and to the IC pins. The ground side of the

transformer should be connected via a dedicated PC board

track to the AGND pin, rather than through the ground plane.

If the current sense circuit employs a sense resistor in the

drive transistor source, low inductance resistors should be

used. In this case, all the noise sensitive, low-current ground

tracks should be connected in common near the IC, and then

a single connection made to the power ground (sense resis-

tor ground point).

The gate drive outputs of the LM5035 should have short,

direct paths to the power MOSFETs in order to minimize

inductance in the PC board traces. The SR control outputs

should also have minimum routing distance through the

pulse transformers and through the secondary gate drivers

to the sync FETs.

The two ground pins (AGND, PGND) must be connected

together with a short, direct connection, to avoid jitter due to

relative ground bounce.

If the internal dissipation of the LM5035 produces high junc-

tion temperatures during normal operation, the use of mul-

tiple vias under the IC to a ground plane can help conduct

heat away from the IC. Judicious positioning of the PC board

within the end product, along with use of any available air

flow (forced or natural convection) will help reduce the junc-

tion temperatures. If using forced air cooling, avoid placing

the LM5035 in the airflow shadow of tall components, such

as input capacitors.

20177516

FIGURE 16. Hiccup Over-Load Restart Timing

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