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USB4715 数据表(PDF) 10 Page - Microchip Technology |
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USB4715 数据表(HTML) 10 Page - Microchip Technology |
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10 / 47 page ![]() USB4715 DS00002514B-page 10 2022 Microchip Technology Inc. and its subsidiaries SPI Chip Enable SPI_CE_EN I/O4 Active low SPI chip enable input. If the SPI interface is enabled, this pin must be driven high in powerdown states. Note: If SPI interface is not utilized, this pin cannot be left floating. It must be connected per the CFG_NON_REM pin description. SQI Interface Pins SQI Clock SQI_CLK I/O4 SQI clock. SQI Data 0-3 SQI_D[0:3] I/O4 SQI Data 0-3. If the SQI interface is enabled, these sig- nals function as Data 0 through 3. SQI Chip Enable SQI_CE_EN I/O4 Active low SQI chip enable input. If the SQI interface is enabled, this pin requires an external pull-up resistor. Note: If SQI interface is not utilized, this pin cannot be left floating. It must be connected per the CFG_NON_REM pin description. Miscellaneous Programmable Functions 8-1 PROG_FUNC[8:1] I/O12 These selectable function pins can be assigned a role via the CONFIG_STRAP_[2:1] pins, OTP configuration, or SMBus configuration. Refer to Section 3.3.4, "PROG_FUNC[8:1] Configuration (CON- FIG_STRAP_[2:1])" for additional information. VBUS Detection VBUS_DET I This signal detects the state of the upstream bus power. When designing a detachable hub, this pin must be con- nected to the VBUS power pin of the upstream USB port through a resistor divider (50 k Ω by 100 kΩ) to provide 3.3 V. For self-powered applications with a permanently attached host, this pin must be connected to either 3.3 V or 5.0 V through a resistor divider to provide 3.3 V. In embedded applications, VBUS_DET may be con- trolled (toggled) when the host desires to renegotiate a connection without requiring a full reset of the device. Reset Input RESET_N I This active low signal is used by the system to reset the device. The active low pulse should be at least 1 s wide. Bias Resistor RBIAS I-R A 12.0 k 1.0% resistor is attached from ground to this pin to set the transceiver’s internal bias settings. Place the resistor as close to the device as possible with a dedicated, low impedance connection to the GND plane. External 25 MHz Crystal Input XTALI ICLK External 25 MHz crystal input. TABLE 3-2: PIN DESCRIPTIONS (CONTINUED) Name Symbol Buffer Type Description |
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