

2022 Microchip Technology Inc. and its subsidiaries

DS00002514B-page 13

USB4715

3.3

Configuration Straps and Programmable Functions

Configuration straps are multi-function pins that are used during Power-On Reset (POR) or external chip reset

(

RESET_N) to determine the default configuration of a particular feature. The state of the signal is latched following de-

assertion of the reset. Configuration straps are identified by an underlined symbol name. This section details the various

device configuration straps and associated programmable pin functions.

3.3.1

PORT DISABLE CONFIGURATION (

PRT_DIS_P[4:1] / PRT_DIS_M[4:1])

The

PRT_DIS_P[4:1] / PRT_DIS_M[4:1] configuration straps are used in conjunction to disable the related port (4-1).

For

PRT_DIS_Px (where x is the corresponding port 4-1):

0 = Port x D+ Enabled

1 = Port x D+ Disabled

For

PRT_DIS_Mx (where x is the corresponding port 4-1):

0 = Port x D- Enabled

1 = Port x D- Disabled

3.3.2

NON-REMOVABLE PORT CONFIGURATION (

CFG_NON_REM)

The

CFG_NON_REM configuration strap is used to configure the non-removable port settings of the device to one of

five settings. These modes are selected by the configuration of an external resistor on the

CFG_NON_REM pin. The

resistor options are a 200 kΩ pull-down, 200 kΩ pull-up, 10 kΩ pull-down, 10 kΩ pull-up, and 10 Ω pull-down, as shown

in Table 3-3.

3.3.3

BATTERY CHARGING CONFIGURATION (

CFG_BC_EN)

The

CFG_BC_EN configuration strap is used to configure the battery charging port settings of the device to one of five

settings. These modes are selected by the configuration of an external resistor on the

CFG_BC_EN pin. The resistor

options are a 200 kΩ pull-down, 200 kΩ pull-up, 10 kΩ pull-down, 10 kΩ pull-up, and 10 Ω pull-down, as shown in

Table 3-4.

Note:

The system designer must guarantee that configuration straps meet the timing requirements specified in

Section 9.6.2, "Power-On and Configuration Strap Timing" and Section 9.6.3, "Reset and Configuration

Strap Timing". If configuration straps are not at the correct voltage level prior to being latched, the device

may capture incorrect strap values.

Note:

Both

PRT_DIS_Px and PRT_DIS_Mx (where x is the corresponding port) must be tied to 3.3 V to disable

the associated downstream port.

TABLE 3-3:

CFG_NON_REM RESISTOR ENCODING

CFG_NON_REM Resistor Value

Setting

200 kΩ Pull-Down

Port 1- removable

200 kΩ Pull-Up

Port 1 non-removable

10 kΩ Pull-Down

Port 1, 2 non-removable

10 kΩ Pull-Up

Port 1, 2, 3 non-removable

10 Ω Pull-Down

Port 1, 2, 3, 4 non-removable