STPM10

List of figures

DocID17728 Rev 5

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List of figures

Figure 1: Block diagram ..............................................................................................................................6

Figure 2: Pin connections (top view)...........................................................................................................7

Figure 3: Supply current vs. supply voltage, TA = 25 °C (f = 4.194 MHz, 8.192 MHz) ...........................14

Figure 4: RC oscillator frequency vs. VCC, R = 12 kΩ, TA = 25 °C ........................................................14

Figure 5: RC oscillator: frequency jitter vs. temperature ..........................................................................14

Figure 6: Analog voltage regulator: line - load regulation .........................................................................14

Figure 7: Digital voltage regulator: line - load regulation ..........................................................................15

Figure 8: Voltage channel linearity at different VCC voltages ..................................................................15

Figure 9: Power supply AC rejection vs. VCC ..........................................................................................15

Figure 10: Power supply DC rejection vs. VCC ........................................................................................15

Figure 11: Error over dynamic range gain dependence ...........................................................................16

Figure 12: Primary current channel linearity at different VCC ..................................................................16

Figure 13: Gain response of ΔΣ A/D converters.......................................................................................16

Figure 14: First-

order ΣΔ A/D converter ...................................................................................................19

Figure 15: ZCR signal ...............................................................................................................................19

Figure 16: LIN and BFR signals................................................................................................................20

Figure 17: Band-gap temperature variation ..............................................................................................21

Figure 18: Timings of tamper module - primary channel selected ...........................................................23

Figure 19: Timings of tamper module - secondary channel selected .......................................................23

Figure 20: Different oscillator circuits with (a) quartz, (b) internal oscillator, (c) external source .............24

Figure 21: STPM10 data record map .......................................................................................................28

Figure 22: Timing to provide remote reset request...................................................................................32

Figure 23: Data record reconstruction ......................................................................................................33

Figure 24: Timing for data record reading ................................................................................................34

Figure 25: Timing for writing configuration and mode bits ........................................................................35

Figure 26: Active energy computation diagram ........................................................................................37

Figure 27: STPM10 reference schematic with one current transformer and one shunt ...........................43

Figure 28: TSSOP20 package outline ......................................................................................................44