STPM10 datasheet(20/47 Pages) STMICROELECTRONICS

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Theory of operation

STPM10

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DocID17728 Rev 5

stopped (no LIN trailing edge) this means that the base frequency is lower than fCLK/217 Hz

and a BFR (base frequency range) error flag is set.

Figure 16: LIN and BFR signals

If the number of pulses counted between two trailing edges of LIN is lower than 213, the

base frequency exceeds the limit (this means it is higher than fCLK/215). In this case, the

error must be repeated three consecutive times in order to set the BFR error flag. For

example, with a 4.194304 MHz oscillator frequency and MDIV bit clear (or 8.192 MHz with

MDIV set), fCLK/4 is 1.048576 MHz. If the line frequency is 30 Hz, the counted fCLK/4 pulses

between two LIN trailing edges are 34952, more than 215 (32768 pulses). The BFR low

frequency limit is as follows:

fCLK/217 = 4194304/131072 = 32 Hz

With the same clock frequency, if the line frequency is 130 Hz, the fCLK/4 pulses between

two LIN trailing edges are 8066, less than 213 (8192). The BFR high frequency limit is

then:

fCLK/215 = 4194304/32768 = 128 Hz

The BFR flag is also set if the register value of the RMS voltage drops below 64. BFR is

cleared when the register value goes above 128. The BFR, then, also gives information

about the presence of the line voltage within the meter. When the BFR error is set, the

computation of power is zero unless the FRS bit is set. In fact, the effect of the BFR bit can

be overridden by setting FRS configuration bit.

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