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Introduction

STWLC68 is a Wireless Power Receiver that rectifies the AC voltage developed across the receiving coil and

provides a regulated DC voltage at the output.

The 32-bit core MCU is the supervisor of the whole device and manages all the functional blocks to

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establish and maintain communication with the transmitter,

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ensure adherence to Qi standard specifications (wherever required),

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optimize the efficiency by properly adjusting the operating point

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guarantee reliability by monitoring and protecting both the load and the device itself.

In order to execute the above mentioned (and many others) task, the MCU core relies on a resident firmware

stored in ROM memory. In addition, some configuration parameters (e.g. output voltage, FOD tuning parameters,

etc.) can be saved in the internal One-Time Programmable (OTP) memory and retrieved at power-up, allowing the

STWLC68 to operate as a fully autonomuous stand-alone chip.

Applications in which the host system directly monitors or controls the power transfer, the I2C interface provides

full access to the internal registers of the STWLC68.

The device is also equipped with six programmable general-purpose I/O pins (GPIOs) to implement specific

functions (e.g. driving status LEDs, enabling the output on request, informing the host system about faulty

conditions, etc.).

Figure 1 shows the block diagram of the device with simplified interconnections among the functional blocks. The

synchronous rectifier converts the AC voltage from the receiving coil into a DC voltage at the VRECT pin. The

four switches of the rectifier (that is basically an H-bridge) are controlled by the digital core in order to minimize

both conduction and switching losses as a function of the output voltage and current, both monitored by two

channels of the ADC. Two bootstrap capacitors are externally connected to the BOOT1-BOOT2 pins to correctly

drive the high-side switches of the rectifier.

The output of the rectifier, filtered by an external capacitor, is also the input rail for the main LDO linear regulator

and for the auxiliary linear regulators in charge of deriving the 5 V and 1.8 V supply voltages.

The digital core has full control of the main LDO linear regulator in order to manage the output voltage, the output

current and the drop-out voltage: since the most relevant contribution to the total chip power dissipation is due to

the main linear regulator, minimizing its drop-out voltage is a key factor.

Of course the minimization of the drop-out voltage requires a closed loop regulation of the voltage at the VRECT

pin, i.e. a feedback information that is sent to the transmitter (via ASK modulation) which, in turn, adjusts the

delivered power by acting on the supply voltage, the switching frequency or the switching duty-cycle (or a

combination of the three) of its own power stage, depending on the adopted technique.

This regulation loop involving the transmitter is an essential part of the wireless power transmission and is

extensively described in Qi specifications.

STWLC68

Introduction

DS13131 - Rev 3

page 2/32