LTC6563

24

Rev. 0

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APPLICATIONS INFORMATION

In order to simplify the analysis, an intuitive way to look at

the output loading is to examine its equivalent half-circuit

as shown in Figure 9. With the half-circuit method, any

impedance that is shared between the two halves appears

below).

In Figure 8, the external loading by the ADC and the cable

termination network of R1, and R2 has no effect on the

CM loading of the LTC6563. The range of output CM volt-

age will be as follows:

(1)

For the ADJ setting of 00 where Io is 7mA (see Table 1

CM voltage will only be limited to the LTC6563 output

will vary accordingly. Table 5 shows the minimum com-

puted output CM voltage, output full scale swing, and TIA

gain (RT) for various ADJ settings applied to the circuit

in Figure 7.

For a higher Transimpedance gain (RT) or higher ADC FS

swing, higher ADJ output current settings can be chosen.

Summary of how ADJ affects the TIA gain and differential

output voltage swing is tabulated in Table 5.

Here is a sample calculation of the values in Table 5 (50Ω

Net diff load, full tilt) for ADJ 00 as an illustration:

a. Output current values (ADJ 00) with max input current

of 90µA (from Table 2): 12mA, 2mA

b. Net diff output load: 50Ω (25Ω on each output)

c.

RT Calculation: RT(k

Ω) =

25

Ω[(12mA – 2mA) – (2mA – 12mA)]

90µA

= 5.56kΩ

I1

50

4 TO

OPEN

OUT

TERM

LTC6563

6563 F09

Figure 9. CM Half-Circuit Equivalent for a

Non-Grounded External Load

The internal CM CTRL resistance varies from about 2Ω

to essentially an open circuit. At the lower end of the CM

it will be at the maximum it can reach.

The external CM resistance can also vary greatly, depend-

ing on whether any external loads are terminated differ-

entially or to GND.

Detailed Example 1: Differential Termination ONLY

With an external load connected, the output CM current

splits between the internal TERM pin and the external

load. However, with the configuration shown in Figure 7

and simplified in Figure 8, with no external CM DC current

path to ground, the entire output CM current must flow

through the internal TERM resistor(s).

Table 5. CM Minimum Voltage and Other Operating Performance Values for Various ADJ Settings of Figure 7

ADJ1

ADJ0

CM/AVERAGE OUTPUT

RT (kΩ)

ADC FS DIFF VOLTAGE

SWING WITH FULL

MIN CM VOLTAGE (mV)

0

0

7

5.6

500

380

0

1

14

11.1

1000

756

1

0

21

16.7

1500

1134

1

1

28

22.2

2000

1512