LTC6563

28

Rev. 0

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APPLICATIONS INFORMATION

if ADJ 11 is to be used as shown in Figure 14 where the

external loads (300Ω) mid-point is grounded.

With the modified schematic of Figure 14 the CM voltage is:

(6)

Resulting in the min VCMO for ADJ 11:

= 28mA • 62.5Ω = 1.75V (7)

Table 7 shows the computed minimum CM voltage, TIA

gain (RT), and ADC FS diff voltage swing for various ADJ

settings applied to the Figure 14 configuration:

Figure 14. Reducing the Min CM Voltage with Grounding the External Load Midpoint

Here is a sample calculation of the values in Table 7, related

to the Figure 14 schematic, for ADJ 00 as an illustration:

a. Output current values (ADJ 00) with max input current

of 90µA (from Table 2): 12mA, 2mA

b. Net diff output load: 75Ω (37.5Ω on each output)

c.

RT Calculation: RT(k

Ω) =

37.5

Ω[(12mA – 2mA) – (2mA – 12mA)]

90µA

= 8.3kΩ

d. ADC FS diff voltage calculation = 90µA • 8.3kΩ =

4.99

4.99

4.99

4.99

4.99

4.99

4pF

4pF

4pF

300

300

75 TRANSMISSION LINE

6563 F14

R

R

OMUX

OUT

OUT

TERM

TERM

PWRMD

OUTPUT

STAGE

TILT

ADJ0

ADJ1

BIAS

CTRL

50

50

IO CTRL

CM CTRL

IO CTRL

LTC6563

OUTPUT SECTION

CM

0.1µF

CM

×2

×1

OUTPUT

CLAMPS

LO

HI

CM CONROL

LOOP

HI CTRL

+

–

+

–

75 TRANSMISSION LINE

AD9094

24.9

24.9

200

DIFF

INPUT

Table 7. CM Minimum Voltage and Other Operating Performance Values for Various ADJ Settings of Figure 14

ADJ1

ADJ0

CM/AVERAGE OUTPUT

RT (kΩ)

ADC FS DIFF VOLTAGE

SWING WITH FULL

MIN CM VOLTAGE (mV)

0

0

7

8.3

750

437

0

1

14

16.7

1500

875

1

0

21

25.0

2250*

1312

1

1

28

33.3

3000*

1750

*Limited by output voltage compliance