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ADE7978 数据表(PDF) 84 Page - Analog Devices |
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ADE7978 数据表(HTML) 84 Page - Analog Devices |
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84 / 125 page ![]() ADE7978/ADE7933/ADE7932/ADE7923 Data Sheet Rev. D | Page 84 of 125 POWER-UP PROCEDURE The ADE7978/ADE7933/ADE7932/ADE7923 chipset contains on-chip power supply monitors that supervise the power supply (VDD). The ADE7933/ADE7932 and ADE7923 have a monitor with a threshold at 2.0 V ± 10% and a timeout timer of 23 ms. The ADE7978 has a monitor with a threshold between 2.5 V and 2.6 V and a time-out timer of 32 ms. Because the ADE7933/ ADE7932 and ADE7923 are fully managed by the ADE7978, the power supply monitor of the ADE7978 determines the power-up of the chipset. The ADE7978 is in an inactive state until VDD reaches the thresh- old of 2.5 V to 2.6 V. The ADE7933/ADE7932 and ADE7923 are also in an inactive state. Before the chipset is powered up, ensure that the power supply for the ADE7978 ensures a transition from around 2.5 V or 2.6 V to 3.3 V − 10% in less than 32 ms. Figure 107 shows the power-up procedure, which follows these steps: 1. When VDD crosses the 2.5 V to 2.6 V threshold, the ADE7978 power supply monitor keeps the chip in the inactive state for an additional 32 ms, allowing VDD to reach 3.3 V − 10%, the minimum recommended supply voltage. 2. The ADE7978 starts to function and generates a 4.096 MHz clock signal for the ADE7933/ADE7932 and ADE7923 at the CLKOUT pin. 3. The ADE7933/ADE7932 and ADE7923 devices begin to function. 4. After 20 µs, the ADE7978 resets the ADE7933/ADE7932 and ADE7923 devices by setting the RESET_EN pin low. The ADE7978 toggles the following pins eight times from high to low at a 4.096 MHz frequency (CLKIN/4): VT_A, VT_B, VT_C, and VT_N. 5. The ADE7933/ADE7932 and ADE7923 devices begin to function at default conditions. 6. When the ADE7978, the ADE7933/ADE7932 and ADE7923 devices become fully functional, the IRQ1 interrupt pin is set low, and Bit 15 (RSTDONE) in the STATUS1 register (Address 0xE503) is set to 1. This bit is cleared to 0 during power-up and is set to 1 when the power-up is completed. 7. After a power-up of the ADE7978, the I2C serial port is active. For information about changing the serial port to SPI and about locking in the selected serial port (I2C or SPI), see the Serial Interface Selection section. Immediately after power- up, the ADE7978 resets all registers to their default values. After a successful power-up of the chipset, follow the instructions in the Initializing the Chipset section. If the supply voltage, VDD, falls below 2 V ± 10%, the ADE7978 and the ADE7933/ADE7932 and ADE7923 devices enter an inactive state, which means that no measurements or computations are executed. INITIALIZING THE CHIPSET After the ADE7978/ADE7933/ADE7932/ADE7923 are powered up, initialize the chipset as follows. 1. Monitor the IRQ1 pin until it goes low, indicating that the RSTDONE interrupt is triggered. 2. When the ADE7978 starts functioning after power-up, the I2C port is the active serial port. If SPI communication is to be used, toggle the SS/HSA pin three times from high to low to select the SPI interface. For more information about changing the communication port to SPI, see the Serial Interface Selection section. 3. Read the STATUS1 register (Address 0xE503) to verify that Bit 15 (RSTDONE) is set to 1, and then write a 1 to the bit to clear it. The IRQ1 pin returns high. Because RSTDONE is an unmaskable interrupt, Bit 15 (RSTDONE) must be reset to 0 for the IRQ1 pin to return high. It is recommended that all other flags in the STATUS1 and STATUS0 registers also be reset by writing a 1 to all bits in the registers. 20µs ADE7978, ADE7933/ADE7932 AND ADE7923 POWERED UP. 3.3V – 10% 2.5V TO 2.6V ADE7978 STARTS FUNCTIONING. ADE7978 CLOCKS ADE7933/ADE7932 AND ADE7923. 0V 32ms ADE7978 POR TIMER TURNED ON. RSTDONE INTERRUPT TRIGGERED. ADE7978, ADE7933/ADE7932 AND ADE7923 READY. 50ms MICROPROCESSOR MAKES THE CHOICE BETWEEN I2C AND SPI. ADE7978 RESETS ADE7933/ADE7932 AND ADE7923. ADE7933/ADE7932 AND ADE7923 START FUNCTIONING. Figure 107. Power-Up Procedure |
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