ADE7978 datasheet(20/125 Pages) AD

20 / 125 page

ADE7978/ADE7933/ADE7932/ADE7923

Data Sheet

Rev. D | Page 20 of 125

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

VT_B

DATA_B

RESET_EN

CLKOUT

SYNC

VT_C

DATA_C

17 SCLK/SCL

18 MISO/HSD

19 MOSI/SDA

20 GND

21 VDD

16 SS/HSA

15 CF3/HSCLK

ADE7978

TOP VIEW

(Not to Scale)

NOTES

1. CREATE A SIMILAR PAD ON THE PCB UNDER THE

EXPOSED PAD. SOLDER THE EXPOSED PAD TO

THE PAD ON THE PCB TO CONFER MECHANICAL

STRENGTH TO THE PACKAGE. CONNECT THE

PADS TO DGND AND GND.

Figure 11. Pin Configuration, ADE7978

Table 14. Pin Function Descriptions, ADE7978

Pin No.

Mnemonic

Description

VT_B

Selects the second voltage input (V2P) or the temperature measurement on the Phase B ADE7933/ADE7932.

Connect this pin to the V2/TEMP pin of the Phase B ADE7933/ADE7932. If no ADE7933/ADE7932 is used to

sense Phase B—as in the 3-phase, 3-wire delta configuration—leave this pin unconnected.

DATA_B

Receives the bit streams from the Phase B ADE7933/ADE7932. Connect this pin to the DATA pin of the Phase B

ADE7933/ADE7932. If no ADE7933/ADE7932 is used to sense Phase B—as in the 3-phase, 3-wire delta

configuration—connect this pin to VDD.

RESET_EN

Reset Output Enable. Connect this pin to the RESET_EN pins of the ADE7933/ADE7932/ADE7923 devices. This

pin is used by the ADE7978 to reset the ADE7933/ADE7932 devices (see the Hardware Reset section).

CLKOUT

4.096 MHz Output Clock Signal. Connect this pin to the XTAL1 pins of the ADE7933/ADE7932 devices.

SYNC

Clock Output (1.024 MHz). This pin is the clock for serial communication with the ADE7933/ADE7932/ADE7923

devices. Connect this pin to the SYNC pins of the ADE7933/ADE7932/ADE7923 devices.

VT_C

Selects the second voltage input (V2P) or the temperature measurement on the Phase C ADE7933/ADE7932.

Connect this pin to the V2/TEMP pin of the Phase C ADE7933/ADE7932. If no ADE7933/ADE7932 is used to

sense Phase C, leave this pin unconnected.

DATA_C

Receives the bit streams from the Phase C ADE7933/ADE7932. Connect this pin to the DATA pin of the Phase C

ADE7933/ADE7932. If no ADE7933/ADE7932 is used to sense Phase C, connect this pin to VDD.

VT_N

Selects the second voltage input (V2P) or the temperature measurement on the neutral line ADE7933/ADE7932

or ADE7923. Connect this pin to the V2/TEMP pin of the neutral line ADE7933/ADE7932 or ADE7923. If no

ADE7933, ADE7932, or ADE7923 is used to sense the neutral line, leave this pin unconnected.

DATA_N

Receives the bit streams from the neutral line ADE7933, ADE7932, or ADE7923. Connect this pin to the DATA pin

of the neutral line ADE7933, ADE7932, or ADE7923. If no ADE7933, ADE7932, or ADE7923 is used to sense the

neutral line, connect this pin to VDD.

10, 11

IRQ0, IRQ1

Interrupt Request Outputs. These pins are active low logic outputs. For information about the events that can

trigger an interrupt, see the Interrupts section.

RESET

Reset Input, Active Low. Set this pin low for at least 10 µs to trigger a hardware reset (see the Hardware Reset

section).

13, 14, 15

CF1, CF2,

CF3/HSCLK

Calibration Frequency (CF) Logic Outputs. These outputs provide power information and are used for

operational and calibration purposes. CF3 is multiplexed with the serial clock output of the HSDC port.

SS/HSA

Slave Select for the SPI Port/HSDC Port Active.

SCLK/SCL

Serial Clock Input for the SPI Port/Serial Clock Input for the I2C Port. This pin has a Schmitt trigger input for

use with clock sources that have a slow edge transition time, for example, opto-isolator outputs. The default

functionality of this pin is SCL.

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