| 数据搜索系统,热门电子元器件搜索 |
|
ADE7978 数据表(PDF) 24 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADE7978 数据表(HTML) 24 Page - Analog Devices |
|
24 / 125 page ![]() ADE7978/ADE7933/ADE7932/ADE7923 Data Sheet Rev. D | Page 24 of 125 ADE7923 TOP VIEW (Not to Scale) VDD 1 GND 2 V2P 3 V1P 4 GND 20 VDD 19 PULL_LOW 18 V2/TEMP 17 VM 5 RESET_EN 16 IM 6 DATA 15 IP 7 XTAL2 14 LDO 8 XTAL1 13 REF 9 SYNC 12 GND 10 GND 11 Figure 13. Pin Configuration, ADE7923 Table 16. Pin Function Descriptions, ADE7923 Pin No. Mnemonic Description 1, 19 VDD Supply Voltage. These pins provide the supply voltage for the ADE7923. Maintain the supply voltage at 3.3 V ± 10% for specified operation. Decouple each VDD pin to GND with a ceramic 100 nF capacitor in parallel with a single 10 µF capacitor. The VDD pins must be connected externally. 2, 10, 11, 20 GND Ground Reference. These ground pins must be connected externally. 3, 4, 5 V2P, V1P, VM Analog Inputs for the Voltage Channels. These channels are used with voltage transducers and are referred to in this data sheet as the voltage channels. These inputs are pseudo differential voltage inputs with a maximum signal level of ±0.5 V with respect to VM for specified operation. Use these pins with the related input circuitry, as shown in Figure 42. If the V1P or V2P pin is not used on the ADE7923, connect the unused pin to the VM pin. 6, 7 IM, IP Analog Inputs for the Current Channel. This channel is used with shunts and is referred to in this data sheet as the current channel. These inputs are pseudo differential voltage inputs with a maximum differential level of ±31.25 mV. Use these pins with the related input circuitry, as shown in Figure 42. 8 LDO 2.5 V Output of the Analog Low Dropout (LDO) Regulator. Decouple this pin with a 4.7 µF capacitor in parallel with a ceramic 100 nF capacitor using GND. Do not connect active external circuitry to this pin. 9 REF Voltage Reference. This pin provides access to the on-chip voltage reference. The on-chip reference has a nominal value of 1.2 V. Decouple this pin to GND with a 4.7 µF capacitor in parallel with a ceramic 100 nF capacitor. 12 SYNC Synchronization Pin. The 1.024 MHz clock signal generated by the ADE7978 SYNC pin is used for serial communication between the ADE7933/ADE7932/ADE7923 and the ADE7978. Connect the ADE7923 SYNC pin to the SYNC pin of the ADE7978. 13 XTAL1 Master Clock. Connect this pin to the ADE7978 CLKOUT pin. The clock frequency for specified operation is 4.096 MHz. When the ADE7933/ADE7932/ADE7923 and the ADE7978 are used as a chipset, the ADE7933/ ADE7932/ADE7923 must function synchronously with the ADE7978; therefore, the XTAL1 pin of the ADE7933/ ADE7932/ADE7923 must be connected to the CLKOUT pin of the ADE7978. If the ADE7933/ADE7932/ADE7923 are used as standalone chips, a crystal with a maximum drive level of 0.5 mW and an ESR of 20 Ω can be connected across XTAL1 and XTAL2 to provide a clock source for the ADE7933/ADE7932/ADE7923. The clock frequency for specified operation is 4.096 MHz, but lower frequencies down to 3.6 MHz can be used. For more information, see the ADE7978, ADE7933/ADE7932, and ADE7923 Clocks section. 14 XTAL2 Leave this pin open when the ADE7933/ADE7932/ADE7923 are used with the ADE7978. If the ADE7933/ADE7932/ ADE7923 are used as standalone chips, a crystal with a maximum drive level of 0.5 mW and an ESR of 20 Ω can be connected across XTAL1 and XTAL2 to provide a clock source for the ADE7933/ADE7932/ADE7923. 15 DATA Data Output for Communication with the ADE7978. Connect the DATA pin of the ADE7923 to the DATA_N pin on the ADE7978. 16 RESET_EN Reset Input Enable, Active Low. The ADE7923 is reset by setting the RESET_EN pin low and toggling the V2/TEMP pin four times with a frequency of 4.096 MHz. The reset ends when this pin and the V2/TEMP pin are set high (see the Hardware Reset section). 17 V2/TEMP This input pin selects the signal that is converted at the second voltage channel of the ADE7923. When this pin is high, the voltage input V2P is sensed; when this pin is low, the temperature sensor is measured. The V2/TEMP pin is also used during the ADE7933/ADE7932/ADE7923 reset procedure. For the ADE7923, the V2/TEMP pin must always be connected to the VT_N pin on the ADE7978. For more information, see the Second Voltage Channel and Temperature Measurement section. 18 PULL_LOW Connect this pin to GND for proper operation. |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |