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ADGM1304JCPZ-R2 数据表(PDF) 33 Page - Analog Devices

部件名 ADGM1304JCPZ-R2
功能描述  0 Hz/dc to 14 GHz, Single-Pole, Four-Throw MEMS Switch with Integrated Driver
PDF  34 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADGM1304JCPZ-R2 数据表(HTML) 33 Page - Analog Devices

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Data Sheet
ADGM1304
Rev. G | Page 33 of 34
REGISTER SUMMARY AND DETAILS
Table 9. Register Summary
Reg
Name
Bits
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
R/W
0x20
SWITCH_DATA
[7:0]
INTERNAL_ERROR
RESERVED
SW4_EN
SW3_EN
SW2_EN
SW1_EN
0x00
R/W
SWITCH DATA REGISTER
Address: 0x20, Reset: 0x00, Name: SWITCH_DATA
The switch data register controls the status of the four switches of the ADGM1304.
Table 10. Bit Descriptions for SWITCH_DATA
Bits
Bit Name
Settings
Description
Reset
Access
[7:6]
INTERNAL_ERROR
Internal Error Detection. These bits determine if an internal error has
occurred.
0x0
R
00
No error detected.
01
Error detected.
10
Error detected.
11
Error detected.
[5:4]
RESERVED
Reserved. These bits are reserved. Set these bits to 0.
0x0
R
3
SW4_EN
Enable for Switch 4.
0x0
R/W
0
Switch 4 open.
1
Switch 4 closed.
2
SW3_EN
Enable for Switch 3.
0x0
R/W
0
Switch 3 open.
1
Switch 3 closed.
1
SW2_EN
Enable for Switch 2.
0x0
R/W
0
Switch 2 open.
1
Switch 2 closed.
0
SW1_EN
Enable for Switch 1.
0x0
R/W
0
Switch 1 open.
1
Switch 1 closed.



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