MPFS025T datasheet(46/50 Pages) MICROCHIP

46 / 50 page

11.

Revision History

Revision Date

Description

07/2021

• Added RV64GC and RV64IMAC nomenclature.

• Added footnote on power domains.

• Corrected the GPIO# for FCG1152 package.

• Removed references to the deprecated document UG0880 and added

references to PolarFire SoC MSS Technical Reference Manual.

02/2021

• Updated feature descriptions throughout the entire document, notably adding

sections for the PolarFire SoC Icicle Kit, Mi-V Ecosystem, PolarFire SoC MSS

Configurator, Hart Software Services (HSS), and Lower Power "L" Devices.

• Included MPFS250TS and MPFS250TLS devices in PolarFire SoC Device

Offerings.

• Updated Coremarks/MHz and DMIPS/MHz in Microprocessor Subsystem

Features.

• Corrected LSRAM size from 20 Kbytes to 20 Kb.

• Added Figure 3-2. AXI Switch Connectivity.

• Added description of MSSIO in Processor I/O.

• Removed PCIe lane assignment information and deferred to PCIe user guide.

• Added Table 9-2. Export Classification.

09/2020

In Revision A, the document was updated to Microchip template.

1.0

12/2019

This is the initial release of this document.

Revision History

and its subsidiaries

Overview

DS60001656C-page 46

MPFS025T 数据表(PDF) 46 Page - Microchip Technology