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CC2430-RTR1-F64 数据表(PDF) 64 Page - Texas Instruments |
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CC2430-RTR1-F64 数据表(HTML) 64 Page - Texas Instruments |
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64 / 234 page ![]() CC2430 CC2430 PRELIMINARY Data Sheet (rev. 1.03) SWRS036A Page 64 of 232 Command Instruction code Description CHIP_ERASE 0001 0x00 Perform flash chip erase (mass erase) and clear lock bits. If any other command, except READ_STATUS, is issued, then the use of CHIP_ERASE is disabled. WR_CONFIG 0001 1x01 Write configuration data. Refer to Table 34 RD_CONFIG 0010 0100 Read configuration data. Returns value set by WR_CONFIG command. GET_PC 0010 1000 Return value of 16-bit program counter. Returns 2 bytes regardless of value of bit 2 in instruction code READ_STATUS 0011 0x00 Read status byte. Refer to Table 35 SET_HW_BRKPNT 0011 1x11 Set hardware breakpoint HALT 0100 0100 Halt CPU operation RESUME 0100 1100 Resume CPU operation. The CPU must be in halted state for this command to be run. DEBUG_INSTR 0101 01xx Run debug instruction. The supplied instruction will be executed by the CPU without incrementing the program counter. The CPU must be in halted state for this command to be run. STEP_INSTR 0101 1100 Step CPU instruction. The CPU will execute the next instruction from program memory and increment the program counter after execution. The CPU must be in halted state for this command to be run. STEP_REPLACE 0110 01xx Step and replace CPU instruction. The supplied instruction will be executed by the CPU instead of the next instruction in program memory. The program counter will be incremented after execution. The CPU must be in halted state for this command to be run. GET_CHIP_ID 0110 1000 Return value of 16-bit chip ID and version number. Returns 2 bytes regardless of value of bit 2 of instruction code Table 33: Debug Commands Bit Name Description 7-4 - Not used Disable timers. Disable timer operation 0 Do not disable timers 3 timers_off 1 Disable timers DMA pause 0 Enable DMA transfers 2 DMA_pause 1 Pause all DMA transfers Suspend timers. Timer operation is suspended for debug instructions and if a step instruction is a branch. If not suspended these instructions would result an extra timer count during the clock cycle in which the branch is executed 0 Do not suspend timers 1 timer_suspend 1 Suspend timers Select flash information page 0 Select flash main page 0 sel_flash_info_page 1 Select flash information page Table 34: Debug Configuration |
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