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CC2430-RTR1-F64 数据表(PDF) 77 Page - Texas Instruments |
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CC2430-RTR1-F64 数据表(HTML) 77 Page - Texas Instruments |
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77 / 234 page ![]() CC2430 CC2430 PRELIMINARY Data Sheet (rev. 1.03) SWRS036A Page 77 of 232 P2SEL (0xF5) – Port 2 Function Select Bit Name Reset R/W Description 7 - 0 R0 Not used Port 1 peripheral priority control. These bits shall determine the order of priority in the case when PERCFG assigns USART0 and USART1 to the same pins. 0 USART0 has priority 6 PRI3P1 0 R/W 1 USART1 has priority Port 1 peripheral priority control. These bits shall determine the order of priority in the case when PERCFG assigns USART1 and timer 3 to the same pins. 0 USART1 has priority 5 PRI2P1 0 R/W 1 Timer 3 has priority Port 1 peripheral priority control. These bits shall determine the order of priority in the case when PERCFG assigns timer 1 and timer 4 to the same pins. 0 Timer 1 has priority 4 PRI1P1 0 R/W 1 Timer 4 has priority Port 1 peripheral priority control. These bits shall determine the order of priority in the case when PERCFG assigns USART0 and timer 1 to the same pins. 0 USART0 has priority 3 PRI0P1 0 R/W 1 Timer 1 has priority P2_4 function select 0 General purpose I/O 2 SELP2_4 0 R/W 1 Peripheral function P2_3 function select 0 General purpose I/O 1 SELP2_3 0 R/W 1 Peripheral function P2_0 function select 0 General purpose I/O 0 SELP2_0 0 R/W 1 Peripheral function |
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