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VL53L4CD 数据表(PDF) 27 Page - STMicroelectronics |
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VL53L4CD 数据表(HTML) 27 Page - STMicroelectronics |
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27 / 37 page ![]() 9 Packaging and labeling 9.1 Product marking A two line product marking is applied on the backside of the module (i.e. on the substrate). The first line is the silicon product code, and the second line, the internal tracking code. 9.2 Inner box labeling The labeling follows the ST standard packing acceptance specification. The following information will be on the inner box label: • Assembly site • Sales type • Quantity • Trace code • Marking • Bulk ID number 9.3 Packing At customer level, it is recommended to mount the VL53L4CD in a clean environment to avoid foreign material deposition. To help avoid any foreign material contamination at product assembly level the modules is shipped in a tape and reel format. The tape is described in Figure 24. Tape outline drawing. The packaging is vacuum sealed and includes a desiccant. VL53L4CD Packaging and labeling DS13812 - Rev 5 page 27/37 |
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