Application information

HVLED007

18/33

DS12866 Rev 1

Figure 8. Output characteristic of pin COMP and significant levels

are interpreted as an "out of regulation condition" (see "Section 4.9: Overload and short-

dead-zone under the lower end of the regulation range.

A capacitor placed between the pin and ground, as close to the IC as possible, may be used

to either set a pole in the output-to-control transfer function or, in case frequency

compensation is done entirely on the secondary side, just reduce noise pick-up. In the latter

case it is recommended that the additional pole set in the transfer function by the filter

decade above the crossover frequency of the overall open-loop transfer function.

It is worth noting that pin COMP can be driven also by a TS431 to close a control loop in

non-isolated applications or in isolated applications with primary sensing regulation.

Additionally, forcing pin COMP below 2.45 V by an external switch results in disabling the

converter.

triggers the so-called "static OVP" function, thus forcing the system to stop and initiating

burst-mode operation. While operating in this mode, the HVLED007 provides a series of

a few switching cycles spaced out by idle periods where the external power switch is in

OFF-state. This ensures system's ability to regulate the output voltage under no load

conditions.

Timer (see "Section 4.8: Zero current detection and triggering block (pin ZCD); starter") is

disabled too. While in the idle state, the converter being stopped, no energy is delivered

to the output, so the output voltage starts decaying. The feedback circuit reacts to this

Start Timer is re-enabled and the IC restarts switching either by a negative-going edge on

the ZCD pin (if the idle time is short enough and the drain voltage is still ringing, see

"Section 4.8: Zero current detection and triggering block (pin ZCD); starter") or by the

Start Timer if no edge is detected on the ZCD pin. If the load level has not changed, after