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ADRF5301BCCZN-R7 数据表(PDF) 9 Page - Analog Devices |
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ADRF5301BCCZN-R7 数据表(HTML) 9 Page - Analog Devices |
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9 / 10 page ![]() Data Sheet ADRF5301 APPLICATIONS INFORMATION analog.com Rev. 0 | 9 of 10 The ADRF5301 has one power supply pin (VDD) and one con- trol pin (CTRL). Figure 14 shows the external components and connections for the supply pin. The VDD pin is decoupled with a 100pF multilayer ceramic capacitor. The device pin-out allows the placement of the decoupling capacitors close to the device. No other external components are needed for bias and operation, except DC blocking capacitors on the RF pins when the RF lines are biased at a voltage different than 0 V. See the Pin Configuration and Function Descriptions section for details. Figure 14. Recommended Schematic RECOMMENDATIONS FOR PRINTED CIRCUIT BOARD DESIGN The RF ports are matched to 50 Ω internally and the pinout is designed to mate a coplanar waveguide (CPWG) with 50 Ω charac- teristic impedance on the PCB. Figure 15 shows the referenced CPWG RF trace design for an RF substrate with 8 mil thick Rogers RO4003 dielectric material. RF trace with 14mil width and 7 mil clearance is recommended for 2.2 mil finished copper thickness. Figure 15. Example PCB Stack-Up Figure 16 shows the routing of the RF traces, supply, and control signals from the device. The ground planes are connected with as many filled, through vias as allowed for optimal RF, and thermal performance. The primary thermal path for the device is the bottom side. Figure 16. PCB Routings Figure 17 shows the recommended layout from the device RF pins to the 50 Ω CPWG on the referenced stack-up. PCB pads are drawn 1:1 to device pads. The ground pads are drawn soldermask defined and the signal pads are drawn as pad defined. The RF trace from the PCB pad is extended with the same width by 2 mils and tapered to RF trace with a 45° angle. The paste mask is also designed to match the pad without any aperture reduction. The paste is divided into multiple openings for the paddle. Figure 17. Recommended RF Pin Transitions For alternate PCB stack-ups with different dielectric thickness and CPWG design, contact Analog Devices, Inc., Technical Support Request for further recommendations. |
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