PTN3355

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Product data sheet

Rev. 3.1 — 4 November 2016

21 of 37

NXP Semiconductors

PTN3355

Low power DP to VGA adapter with integrated 1 : 2 VGA switch

13.3 DisplayPort receiver AUX CH

[1]

Ref. 1 supersedes in case of any mismatch of specification items.

[2]

Results in the bit rate of 1 Mbit/s including the overhead of Manchester II coding.

[3]

Maximum allowable UI variation within a single transaction at connector pins of a transmitting device. Equal to 24 ns maximum. The

transmitting device is a source device for a request transaction and a sink device for a reply transaction.

[4]

Maximum allowable UI variation within a single transaction at connector pins of a receiving device. Equal to 30 ns maximum. The

transmitting device is a source device for a request transaction and a sink device for a reply transaction.

[5]

VAUX_DIFFp-p = 2 VAUX+  VAUX.

[6]

Common-mode voltage is equal to Vbias_TX (or Vbias_RX) voltage.

[7]

Steady-state common-mode voltage shift between transmit and receive modes of operation.

[8]

Total drive current of the transmitter when it is shorted to its ground.

[9]

The AUX CH AC coupling capacitor placed both on the DisplayPort source and sink devices.

Table 16.

DisplayPort receiver AUX CH characteristics[1]

Over operating free-air temperature range, unless otherwise noted.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

UI

unit interval

AUX

[2] 0.4

0.5

0.6

s

tjit(cc)

cycle-to-cycle jitter time

transmitting device

[3] -

-

0.04

UI

receiving device

[4] -

-

0.05

UI

VAUX_DIFFp-p

AUX differential peak-to-peak

voltage

transmitting device

[5] 0.39

-

1.38

V

receiving device

[5] 0.32

-

1.36

V

RAUX_TERM(DC)

AUX CH termination DC resistance informative

-

100

-



VAUX_DC_CM

AUX DC common-mode voltage

[6] 0-

2.0

V

VAUX_TURN_CM

AUX turnaround common-mode

voltage

[7] --

0.3

V

IAUX_SHORT

AUX short-circuit current limit

[8] --

90

mA

CAUX

AUX AC coupling capacitor

[9] 75

-

200

nF