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Fig 1.

Functional diagram

002aag883

DIFF

RCV

CDR,

S2P

RX PHY

ANALOG

SUBSYSTEM

DIFF

RCV

CDR,

S2P

RCV

PTN3355

DRV

MANCHESTER

CODEC

RX DIGITAL SUBSYSTEM

RX PHY DIGITAL

AUX COMMAND

LEVEL MODULE

DPCD

REGISTERS

I2C-BUS

MASTER

NVM

MCU

CONTROL

TIME

CONV.

ISOCHRONOUS LINK

TIMING RECOVERY

MAIN

STREAM

DAC

DAC

DAC

R[7:0]

G[7:0]

B[7:0]

VGA

OUTPUT

WITH

1 : 2

VGA

SWITCH

H, V

sync

VIDEO DAC SUBSYSTEM

RED1

GRN1

BLU1

HSYNC1

VSYNC1

DDC1_SCL

DDC1_SDA

Vbias

Vbias

Vbias

ML0_P, ML0_N

ML1_P, ML1_N

AUX_P, AUX_N

DOCK_IN,

CFG3, CFG5,

TESTMODE

RED2

GRN2

BLU2

HSYNC2

VSYNC2

DDC2_SCL

DDC2_SDA

HPD

CFG1_SCL, CFG2_SDA

OSC_OUT

RST_N

OSC_IN

RSET